Nanoscale CMOS VLSI Circuits: Design for Manufacturability (Repost)
Sandip Kundu, Aswin Sreedhar, "Nanoscale CMOS VLSI Circuits: Design for Manufacturability"
2010 | ISBN-10: 007163519X | 316 pages | PDF | 4 MB
2010 | ISBN-10: 007163519X | 316 pages | PDF | 4 MB
Cutting-Edge CMOS VLSI Design for Manufacturability Techniques
This detailed guide offers proven methods for optimizing circuit designs to increase the yield, reliability, and manufacturability of products and mitigate defects and failure. Covering the latest devices, technologies, and processes, Nanoscale CMOS VLSI Circuits: Design for Manufacturability focuses on delivering higher performance and lower power consumption. Costs, constraints, and computational efficiencies are also discussed in the practical resource.
Nanoscale CMOS VLSI Circuits covers:
Current trends in CMOS VLSI design
Semiconductor manufacturing technologies
Photolithography
Process and device variability: analyses and modeling
Manufacturing-Aware Physical Design Closure
Metrology, manufacturing defects, and defect extraction
Defect impact modeling and yield improvement techniques
Physical design and reliability
DFM tools and methodologies