Coupled Data Communication Techniques for High-Performance and Low-Power Computing (repost)
Coupled Data Communication Techniques for High-Performance and Low-Power Computing by Ron Ho, Robert Drost
English | ISBN: 1441965874 | edition 2010 | PDF | 206 pages | 25,7 mb
English | ISBN: 1441965874 | edition 2010 | PDF | 206 pages | 25,7 mb
This book provides an overview of the circuits, architectures, and chip packaging for coupled data techniques. It discusses the current research in chip-to-board capacitive coupling, chip-to-chip capacitive coupling, chip-to-chip inductive coupling, and chip-to-chip optical coupling. Circuits, modeling, and their implications for packaging are explored in depth.
Mechanical methods to ensure accurate and sustained chip alignment are discussed, as well as electrical methods to compensate for resulting misalignment. Finally, the book covers issues raised by design for manufacturing and test.
This book is one of the first in a new and emerging area. Coupled data communication offers new ways of looking at the old problem of limited off-chip I/O: it trades off packaging complexity for I/O performance; it offers a set of enabling technologies for 3D or stacked-chip architectures; and it raises the possibility of replace-able chips–and thus high yield–in an MCM.