Low Power Networks-on-Chip (Repost)
Low Power Networks-on-Chip by Cristina Silvano
English | 2010 | ISBN: 1441969101 | 300 Pages | PDF | 12 MB
English | 2010 | ISBN: 1441969101 | 300 Pages | PDF | 12 MB
In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.
Low Power Networks-on-Chip (Repost)
