High Performance Embedded Architectures and Compilers: Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 2
High Performance Embedded Architectures and Compilers: Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008. Proceedings By Mateo Valero, Jesús Labarta (auth.), Per Stenström, Michel Dubois, Manolis Katevenis, Rajiv Gupta, Theo Ungerer (eds.)
2008 | 400 Pages | ISBN: 3540775595 | PDF | 10 MB
2008 | 400 Pages | ISBN: 3540775595 | PDF | 10 MB
This highly relevant and up-to-the-minute book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008.The 25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions.The papers are organized into topical sections on a number of key subjects in the field, including multithreaded and multicore processors, reconfigurable ASIP, and compiler optimizations.Also covered are industrial processors and application parallelization, power-aware techniques, and high-performance processors.The book also contains material on the collection and analysis of profiles as well as optimizing memory performance.
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