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High-Ratio Voltage Conversion in CMOS for Efficient Mains-Connected Standby

Posted By: Underaglassmoon
High-Ratio Voltage Conversion in CMOS for Efficient Mains-Connected Standby

High-Ratio Voltage Conversion in CMOS for Efficient Mains-Connected Standby
Springer | Circuits & Systems | May 30, 2016 | ISBN-10: 3319312065 | 220 pages | pdf | 6.33 mb

Authors: Meyvaert, Hans, Steyaert, Michiel
Discusses high-power-density monolithic switched-capacitor DC-DC conversion in bulk CMOS, including a theoretical analysis of the impact of the most important loss contribution, the bottom-plate parasitic coupling
Describes advances on AC-DC conversion in a monolithic single-stage solution, as well as a highly-integrated two-stage approach
Includes theoretical analysis and comparison of monolithic switched-capacitor DC-DC converter topologies toward high-ratio voltage conversion


This book describes synergetic innovation opportunities offered by combining the field of power conversion with the field of integrated circuit (IC) design. The authors demonstrate how integrating circuits enables increased operation frequency, which can be exploited in power converters to reduce drastically the size of the discrete passive components. The authors introduce multiple power converter circuits, which are very compact as result of their high level of integration. First, the limits of high-power-density low-voltage monolithic switched-capacitor DC-DC conversion are investigated to enable on-chip power granularization. AC-DC conversion from the mains to a low voltage DC is discussed, enabling an efficient and compact, lower-power auxiliary power supply to take over the power delivery during the standby mode of mains-connected appliances, allowing the main power converter of these devices to be shut down fully.

Number of Illustrations and Tables
58 b/w illustrations, 30 illustrations in colour
Topics
Circuits and Systems
Signal, Image and Speech Processing
Electronics and Microelectronics, Instrumentation

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