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Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute (Repost)

Posted By: AvaxGenius
Date: 22 Jun 2022 19:25:55
Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute (Repost)

Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute by John Michael Williams
English | PDF | 2014 | 557 Pages | ISBN : 3319047884 | 14.5 MB

This book is structured as a step-by-step course of study along the lines of a VLSI integrated circuit design project. The entire Verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer-deserializer, including synthesizable PLLs. The author includes everything an engineer needs for in-depth understanding of the Verilog language: Syntax, synthesis semantics, simulation, and test. Complete solutions for the 27 labs are provided in the downloadable files that accompany the book.
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System Verilog Assertions and Functional Coverage: Guide to Language, Methodology and Applications, Third Edition (Repost)

Posted By: AvaxGenius
Date: 26 Aug 2021 14:50:51
System Verilog Assertions and Functional Coverage: Guide to Language, Methodology and Applications, Third Edition (Repost)

System Verilog Assertions and Functional Coverage: Guide to Language, Methodology and Applications, Third Edition by Ashok B. Mehta
English | PDF | 2019 | 524 Pages | ISBN : 3030247368 | 46.3 MB

This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and Functional Coverage. Readers will benefit from the step-by-step approach to learning language and methodology nuances of both SystemVerilog Assertions and Functional Coverage, which will enable them to uncover hidden and hard to find bugs, point directly to the source of the bug, provide for a clean and easy way to model complex timing checks and objectively answer the question ‘have we functionally verified everything’.
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