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ASAP 7nm PDK version 1p7

Posted By: scutter
ASAP 7nm PDK version 1p7

ASAP 7nm PDK version 1p7 | 4.5 Gb

The Lawrence Clark, an Emeritus Professor in the School of Electrical, is pleased to announce the availability of ASAP 7nm PDK version 1p7. This PDK contains SPICE-compatible FinFET device models (BSIM-CMG), Technology files for Cadence Virtuoso, Design Rule Checker (DRC), Layout vs Schematic Checker (LVS) and Extraction Deck for the 7nm technology node.