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    Cadence XCELIUMMAIN 24.03.001

    Posted By: scutter
    Cadence XCELIUMMAIN 24.03.001

    Cadence XCELIUMMAIN 24.03.001 | 6.9 Gb

    Cadence Design Systems, Inc. , the leader in global electronic design innovation, is pleased to announce the availability of XCELIUM 24.03.001 (XCELIUMMAIN) is part of the Cadence Verification Suite and supports the company’s Intelligent System Design strategy, enabling pervasive intelligence and faster design closure.

    AVSREQ-208145 ASSERTION_COMPILE *W,RUNONC for a concurrent assertion on 23.09.v002
    AVSREQ-203715 ASSERTION_COMPILE xmvlog *F, INTERR: XalSVFSampCheck::walkExprFunc:: illegal ue in ue
    AVSREQ-203216 ASSERTION_DEBUG function with assertion in package is not controlled by $assertoff
    AVSREQ-201233 ASSERTION_DEBUG Assertion passing in 22.09 but failing in 23.05a071
    AVSREQ-210683 ASSERTION_PERFORMANCE Assertion performance issue
    AVSREQ-210084 ASSERTION_PERFORMANCE Optimize assertions with unbounded range 0:$
    AVSREQ-210083 ASSERTION_PERFORMANCE Optimize assertions with unbounded range 1:$
    AVSREQ-206690 ASSERTION_PERFORMANCE liveness property runtime degredation 22.03.v005 -> 23.03.v004
    AVSREQ-206328 ASSERTION_PERFORMANCE s_eventually always optimization
    AVSREQ-204199 ASSERTION_PERFORMANCE Remove VST access of assertion state variable
    AVSREQ-203821 ASSERTION_PERFORMANCE Make -ENABLE_ABV_PURE_FUNC_OPT optimization default
    AVSREQ-203391 ASSERTION_PERFORMANCE Performance improvement for ARM test case
    AVSREQ-202769 ASSERTION_PERFORMANCE Populate VST of statevar in the VST of property and endpoint
    AVSREQ-200829 ASSERTION_PERFORMANCE Optimization of function calls used in assertions
    AVSREQ-200814 ASSERTION_PERFORMANCE Dead code always blocks for deferred assertions
    AVSREQ-199292 ASSERTION_PERFORMANCE Optimize concatenation expressions used in $stable/$ changed
    AVSREQ-197819 ASSERTION_PERFORMANCE Optimization of assertions containing variables of complex datatypes
    AVSREQ-203541 ASSERTION_SIM Xcelium doesn't support all assertion types for $assertcontrol
    AVSREQ-201567 ASSERTION_SIM elaboration exits unexpectedly when using -ABV_CONTROL_PKG_ASRTS
    AVSREQ-195581 ASSERTION_SIM Seemingly passing assertion marked as failed
    AVSREQ-190491 ASSERTION_SIM -totalerrormax omits failures coming from liveness properties at the end of simulation
    AVSREQ-182345 ASSERTION_SIM Xcelium does not support to $assertcontrol system task with the values 16 (Expect), 64 (unique0) of assertion type under LRM.
    AVSREQ-182142 ASSERTION_SIM Xcelium doesnt support all LRM options for $assertcontrol - assertion type
    AVSREQ-180276 ASSERTION_SIM assertion failure message is not printed when TCL setting assert_output_stop_level to failure is being passed using 22.03 stream
    AVSREQ-210080 ASSERTION_SVA Unexpected SVA fail due to function used in $past
    AVSREQ-181574 ASSERTION_SVA s_eventually unexpected behavior
    AVSREQ-190177 ASSERTION_SVF Issue with $past; Behavior not consistent with Jasper too
    AVSREQ-196586 ASSERTION_VPI Support for VPI Assertion Control Features vpiAssertionLock, vpiAssertionUnlock and more
    AVSREQ-159045 CORE_RAND xmml backdoor mode option used wrongly caused lot of issues
    AVSREQ-88858 CORE_RAND Unknown XCELIGEN_OPTIONS should be a warning that can be promoted to error/fatal
    AVSREQ-201782 COVERAGE_ASSERTIONS deselect_coverage -remove_empty_instances removes assertion type coverage if scope contains only assertion coverage
    AVSREQ-204811 COVERAGE_COVERGROUP xmsim internal exception "sslu_shm_sv_reg_create_type - unknown/unsupported VST_T_*"
    AVSREQ-203188 COVERAGE_COVERGROUP Incorrectly located covergroup instances
    AVSREQ-198079 COVERAGE_COVERGROUP xmelab: *F,INTERR: INTERNAL EXCEPTION with SV UVM
    AVSREQ-203565 COVERAGE_FSM *F,INTERR: INTERNAL EXCEPTION issue in coverage runs in FSM enabled
    AVSREQ-193134 COVERAGE_FSM *F,INTERR: INTERNAL EXCEPTION at elaboration stage with FSM coverage
    AVSREQ-179673 COVERAGE_FSM ICFDTA error during elaboration with coverage
    AVSREQ-190776 COVERAGE_FUNCTIONAL xmvlog_cg error at the end of elaboration
    AVSREQ-187421 COVERAGE_FUNCTIONAL Request support for coverpoint wildcard bins with "with construct"
    AVSREQ-186900 COVERAGE_FUNCTIONAL Internal ERROR gq_gen - OP_SVHASSIGN SVHR type mismatch
    AVSREQ-204737 COVERAGE_GENERAL Reset coverage using tcl command leads to *F,INTERR
    AVSREQ-196616 COVERAGE_GENERAL Expanding Text Macro inside generate blocks to review IMC block coverage
    AVSREQ-182448 COVERAGE_GENERAL Support for generate block as hdl path in CCF file
    AVSREQ-100840 COVERAGE_GENERAL Support escaped identifiers in CCF (select_coverage/deselect_coverage)
    AVSREQ-205371 COVERAGE_INTERFACES *E,COVUMF: Could not open file icc_1390bd61_7cd57bfa.ucm" for writing (ofstream exception). Error while running regressions
    AVSREQ-200241 COVERAGE_INTERFACES Add ucis attributes to mark e struct and non-instantiated e struct - Specman
    AVSREQ-199881 COVERAGE_MERGING vManager crashes with # Problematic frame:
    AVSREQ-207601 COVERAGE_PERFORMANCE Simulation performance is very slow when use the competition's ddr vip
    AVSREQ-206661 COVERAGE_PERFORMANCE RTL simulation with coverage 7x slower than OT
    AVSREQ-204185 COVERAGE_PERFORMANCE Coverage build time is still around 1 hour with old ccf file
    AVSREQ-201203 COVERAGE_PERFORMANCE LTC bench coverage build time is 9x longer than no coverage
    AVSREQ-198339 COVERAGE_PERFORMANCE LTC bench coverage sim time is 5x longer than no cov (long test)
    AVSREQ-205198 COVERAGE_TOGGLE xmsim does not work as expected in coverage when adding set_toggle_scoring -sv_mda -sv_mda_of_struct
    AVSREQ-196213 COVERAGE_TOGGLE Crash during coverage dumping
    AVSREQ-191623 DCP Xmdcp replay simulation issue in PBSR testcase
    AVSREQ-200454 DEBUG_COMMAND xmsim: *F,IDAIND: Could not find location of Indago installation "" ""
    AVSREQ-205652 DEBUG_DEP Missing textref in assertion
    AVSREQ-211075 DEBUG_DESIGN_DATABASE Verisium Debug not able to trace drivers on field within a struct
    AVSREQ-209841 DEBUG_DESIGN_DATABASE enum logic port of a single bit shows up with 'other' type
    AVSREQ-209704 DEBUG_DESIGN_DATABASE Bus signal appears as a bit instead of a bus
    AVSREQ-209429 DEBUG_DESIGN_DATABASE "lwd_complete" flow went to indefinite state in presence of "xmclone_memopt" option
    AVSREQ-209046 DEBUG_DESIGN_DATABASE Verisium Debug does not show driver on bound interface
    AVSREQ-205642 DEBUG_DESIGN_DATABASE NOFNAME error being created when attempting to create lwd
    AVSREQ-205554 DEBUG_DESIGN_DATABASE Missing textref for port connection of instantiated module
    AVSREQ-205335 DEBUG_DESIGN_DATABASE Macro ref and some textrefs missing on design
    AVSREQ-205077 DEBUG_DESIGN_DATABASE Missing assertion contributing signals
    AVSREQ-203203 DEBUG_DESIGN_DATABASE Struct inside a generate for loop is missing textref in Verisium Debug Source Browser
    AVSREQ-203156 DEBUG_DESIGN_DATABASE Design stops responding at "Parallel LWD Data Generation" when "-lwdgen" is in Xrun option list
    AVSREQ-202608 DEBUG_DESIGN_DATABASE Post-Process VHDL CONSTANT values not recorded
    AVSREQ-202031 DEBUG_DESIGN_DATABASE Explore Load of struct shows no loads even though there are loads
    AVSREQ-201879 DEBUG_DESIGN_DATABASE No drivers found while using the Trace Driver of a bus bit in generate block
    AVSREQ-201747 DEBUG_DESIGN_DATABASE Verisium Debug exits unexpectedly on macro expansion
    AVSREQ-201354 DEBUG_DESIGN_DATABASE Textref is not available after macro expansion
    AVSREQ-201041 DEBUG_DESIGN_DATABASE textref is not there for assignments in generate blocks
    AVSREQ-200510 DEBUG_DESIGN_DATABASE Master setting to disable persistent sources debug
    AVSREQ-199341 DEBUG_DESIGN_DATABASE DAC crash when driver tracing after valtype mismatch
    AVSREQ-197448 DEBUG_DESIGN_DATABASE Remove xrun option -createdebugdb_noies
    AVSREQ-193941 DEBUG_DESIGN_DATABASE Record connect supply net info to SQL database
    AVSREQ-193937 DEBUG_DESIGN_DATABASE Encrypt persistent files
    AVSREQ-170649 DEBUG_DESIGN_DATABASE VPI ASINPR error when sending signal to schematic
    AVSREQ-156235 DEBUG_DESIGN_DATABASE Verisium Debug does not show connectivity through vhdl generates in design exploration mode
    AVSREQ-156166 DEBUG_DESIGN_DATABASE Verisium Debug does not show connectivity for ff logic on vector in Design Exploration mode
    AVSREQ-207008 DEBUG_PROBE Probe command fails with 23.09 and succeeds with 22.07
    AVSREQ-200269 DEBUG_PROBE Probe with "-exclude" affects simulation performance
    AVSREQ-198533 DEBUG_PROBE Type mismatch between STRAP and waveform database for 2D net
    AVSREQ-195749 DEBUG_PROBE Make probing of fixed array of queue available by default
    AVSREQ-193016 DEBUG_PROBE Snapshot character replacement when using 'database -open' TCL command
    AVSREQ-178999 DEBUG_PROBE Waves does not have the last clk cycle when a test fails
    AVSREQ-212111 DEBUG_RUNTIME_DATABASE Add liverecorder support to cds-du-agent
    AVSREQ-208657 DMS_AMSD Spectre error in SV file instantiation when parameter value passed to it is the return value of a function
    AVSREQ-206545 DMS_AMSD [AMS]: simulation crashing with xmvlog_cg: *F,INTERR: INTERNAL EXCEPTION in Specman+AMS sims
    AVSREQ-196217 DMS_AMSD Support $cds_analog_exist/$cds_analog_is_valid also in pure digital simulation
    AVSREQ-188340 DMS_AMSD $SIE_input function gives different results in 20.05.v001 and 22.04.v003
    AVSREQ-107023 DMS_AMSD MSSYSTF error encountered with use of $cds_analog_is_valid in DMS mode
    AVSREQ-209574 DMS_ANALOG_ELAB Standalone xrun sim is completing. On introducing Analog, block xrun gives "xmsim: *F,Interr: internal Exception" error.
    AVSREQ-204778 DMS_ANALOG_ELAB AMS unexpectedly exit with MESSAGE: ivia_compunit_dereference - NULL instance in xmsim.err
    AVSREQ-209830 DMS_CONNECT_MOD Elaborator crashes when OOMRs are present in the child module of SV-AMS connectmodule with instantiations
    AVSREQ-196641 DMS_CONNECT_MOD IE card with "cellupport" scope on a bus causes incorrect IE info messaging
    AVSREQ-121183 DMS_CONNECT_MOD R2E_2 connect module does not accommodate negative value for vx parameter
    AVSREQ-211684 DMS_ELAB AMS simulation setup: Debugging of connect module placement
    AVSREQ-205761 DMS_ELAB add -dms_real_net_init as part of xrun -help
    AVSREQ-205379 DMS_ELAB xmelab unexpectedly stops with xdiscipline.c". [discipline resolution - unexpected data type]
    AVSREQ-204307 DMS_ELAB Elaboration exits unexpectedly with SV Bind on Spice
    AVSREQ-201480 DMS_ELAB csi-xmelab - CSI: *F,INTERR: INTERNAL EXCEPTION, sv_seghandler - trapno -1 addr
    AVSREQ-201082 DMS_ELAB disciplines : simulation mismatch (i.e. info discrepancy)
    AVSREQ-201080 DMS_ELAB coercion testcase crash
    AVSREQ-201074 DMS_ELAB array testcase: Incorrect processing of array bit-select in CM leads to unexpected exit
    AVSREQ-200084 DMS_ELAB misleading AMSAOIW warning
    AVSREQ-197677 DMS_ELAB Hierarchy in the R2EEnet or EEnet2R connect module goes into an infinite recursion
    AVSREQ-184945 DMS_ELAB Incorrect message in xmelab in co-sim
    AVSREQ-100600 DMS_ELAB Internal exception in AMS co-simulations
    AVSREQ-214194 DMS_LICENSE Simulation time message to be added similar to xmelab: *N,MSFLON: for DMS is getting triggered and DMS license will get checked out.
    AVSREQ-207144 DMS_LICENSE Skipping of DMSO license by using VAMS wrapper
    AVSREQ-189015 DMS_LICENSE How to set lic order for DMS + Single core simulation
    AVSREQ-213035 DMS_LP_AMS lps_power_tchecks: vst_xfile () - expected VST_ROOT, class 32
    AVSREQ-207435 DMS_LP_AMS xmelab errors out with CUVIMG when connect_supply_net has genblk1 in the hierarchy
    AVSREQ-207130 DMS_LP_AMS upf supply net connected to spice vdd port but vdd is not following the source
    AVSREQ-204957 DMS_LP_AMS EEnet_E_Bidir creates ripple on supply voltage in a UPF LPS AMS simulation, probably caused by $cged reading from a UPF LPS power domain
    AVSREQ-204708 DMS_LP_AMS LP_MS: MPSAIV error with UPF->HDL aliasing with same name
    AVSREQ-203398 DMS_LP_AMS UPF-SVAMS CMs are not being inserted in LPMS testcase
    AVSREQ-202631 DMS_LP_AMS LPMSSN warning in 23.09.v001 (only when -xrio option is used)
    AVSREQ-201994 DMS_LP_AMS Error with negative supplies in non-VCT UPF+AMS flow
    AVSREQ-199538 DMS_LP_AMS LP_MS: MPSAIV error with UPF->HDL aliasing with same name
    AVSREQ-197148 DMS_LP_AMS Occured *F,INTERR: INTERNAL EXCEPTION
    AVSREQ-195948 DMS_LP_AMS 20X elaboration overhead while building feedthrough graph in AMS
    AVSREQ-208667 DMS_PERF perf fix in processing packages in UDN flow
    AVSREQ-207979 DMS_PERF Reduce time consumed during "processing packages" with override option
    AVSREQ-191838 DMS_SIM Nets of user defined nettype as the destination in force statement : not supported
    AVSREQ-178643 DMS_SIM Enable "force" support on Wreal Types [LHS] with other Wreal / Real types [RHS]
    AVSREQ-207862 DMS_SOLUTIONS Specify timescale instead of an integer for the start and stop time
    AVSREQ-204813 DMS_SOLUTIONS profiling of UDR does not compile in makelib area
    AVSREQ-202091 DMS_SOLUTIONS Add systask to installation EE Package
    AVSREQ-193843 DMS_SOLUTIONS Fix TCL -flow probe to support `flow registered attributes with -all/-ports option
    AVSREQ-193365 DMS_SOLUTIONS Create a 'cdsinfo.tag' file in each of the 5x libraries delivered with an XCELIUM build
    AVSREQ-211023 DMS_SVAMS wtranif gates connected in parallel drive X
    AVSREQ-98750 DMS_SVAMS Add support to support nettypes through switch primitives – tran, tranif0, tranif1 (*E,CUVINP errors)
    AVSREQ-210735 DMS_VLOG -honorvams is not added to save_args for re-compilation.
    AVSREQ-200002 DMS_VLOG Name change and documentation request for +uresfunc xrun switch
    AVSREQ-190778 DMS_VLOG Generate user friendly error message for Real Arrays
    AVSREQ-138420 DMS_VLOG Request to access dynamic object inside resolution function
    AVSREQ-201904 DMS_VPI AMS errors out when running VPI and electrical bus
    AVSREQ-182248 DMS_WREAL Connecting VAMS wrealmax to SV wreal1driver could give wrong result
    AVSREQ-204207 DOCUMENTATION Fix constraint analyzer references
    AVSREQ-200929 DOCUMENTATION Xcelium Documentation Needs to be changed
    AVSREQ-205413 ELAB_BIND "Configwarn" method is not being help for suppressing the REALCV warnings for a particular module.
    AVSREQ-202006 ELAB_BIND XMClone sv_seghandler INTERR on 2303v3
    AVSREQ-201920 ELAB_BIND CU scope SV binds while using vcfg_no_default_bind should use default binding
    AVSREQ-199654 ELAB_BIND Elaboration crash with XMCLONE enabled
    AVSREQ-196940 ELAB_BIND -configwarn is not being honored in the vams module
    AVSREQ-191330 ELAB_BIND same named package with different implementation in two libraries. Issue an error if -top package_name w/o full LIB.Cell:View is specified.
    AVSREQ-170151 ELAB_BIND Give warning if both configuration and -binding is used
    AVSREQ-210205 ELAB_CLONE Assertion error when simulating xmclone-enabled snapshot
    AVSREQ-207217 ELAB_CLONE Signal propagation failure with XMCLONE
    AVSREQ-202966 ELAB_CLONE Xmclone with AutoMSIE gives internal error on primary snapshot build
    AVSREQ-202244 ELAB_CLONE Testbench build failing with XMCOCR elaboration error
    AVSREQ-201866 ELAB_CLONE Xmclone failure in 23.03.v003 with *XMCOCR error
    AVSREQ-201520 ELAB_CLONE elab exits unexpectedly with -replication_metrics flag
    AVSREQ-199735 ELAB_CLONE Elaboration crash with XMCLONE and pruning enabled
    AVSREQ-199275 ELAB_CLONE *SE Incompatible resolutions for a replicated hierarchical reference
    AVSREQ-198635 ELAB_CLONE Xmclone INTERR without -noprune on 2303v3RC2
    AVSREQ-198368 ELAB_CLONE Cloning disabled due to unsupported multiple modules for SV bind target
    AVSREQ-198099 ELAB_CLONE UVM_ERROR when building with XMCLONE
    AVSREQ-197795 ELAB_CLONE XMCLONE-enabled TB generating multiple UCM files
    AVSREQ-211806 ELAB_PASS0 -ENABLE_EARLY_ELAB_MEMOPT -LEAFTBE flow fails in imc_is_discarded_pot() -> * -> sv_seghandler()
    AVSREQ-210308 ELAB_PASS0 gb202 full config build crashes during elaboration
    AVSREQ-208938 ELAB_PERF Passing switches listed under -disable_new_default_perf does not match elab of -disable_new_default_perf directly
    AVSREQ-207775 ELAB_PERF Allow xmclone replication for instance-based access file in GREEN stream
    AVSREQ-206197 ELAB_PERF Unexpected elaboration stop observed with latest 23.11 nightly kit with "enable_early_elab_memopt"
    AVSREQ-206134 ELAB_PERF Build time slowdown when changing the TB, 1.5hr to 12.5 hr
    AVSREQ-205653 ELAB_PERF Analyzing build-time increase with updated testbench
    AVSREQ-203207 ELAB_PERF xform transformation collapse simple assignments to port
    AVSREQ-203204 ELAB_PERF xform transformation from $signed to signed cast
    AVSREQ-201562 ELAB_PERF xmclone elaboration performance gain less than expected
    AVSREQ-201005 ELAB_PERF GLS: 23.09.e651 EHF 5+x build performance degradation vs. previous EHF
    AVSREQ-200779 ELAB_PERF Xcelium build is 5x slower than competition
    AVSREQ-200348 ELAB_PERF Build performance degradation with new releases
    AVSREQ-199762 ELAB_PERF Elab performance drop approx 2x with use of afile
    AVSREQ-198029 ELAB_PERF Test failed when both -xform_lite Inline_cell and -nocellaccess were used
    AVSREQ-196624 ELAB_PERF productize the -enable_skip_if_hash_remove option
    AVSREQ-193591 ELAB_PERF Significant increase in the elaboration time caused by a small change in one module of the design
    AVSREQ-192273 ELAB_PERF Optimize label_ot_t generation in OT for internal assertion implementation
    AVSREQ-191234 ELAB_PERF Add -enable_constfn_selective_copying into newperf
    AVSREQ-191232 ELAB_PERF Add option -enable_skip_if_hash_remove under either newperf, buildperf or make default
    AVSREQ-189200 ELAB_PERF Top level design units doesn't include $unit_0x318a8eb6_bindInCompilationUnit
    AVSREQ-211266 ELAB_SV Enhanced "static" storage class analysis of SV class members
    AVSREQ-210623 ELAB_SV Enable "MUX" like flow during static analysis
    AVSREQ-210622 ELAB_SV Enable "MUX" like flow during static analysis
    AVSREQ-210515 ELAB_SV Elaboration crash "xmelab: *F,XMERROR_9561: dto_range_width - no width" due to -enable_constfn_selective_copying
    AVSREQ-210183 ELAB_SV Conditional expression needs to be supported in stuck at value computation flow
    AVSREQ-209920 ELAB_SV Supporting port expression as the RHS of a blocking assignment during static analysis
    AVSREQ-209632 ELAB_SV 3 Pin OR gate is required to be supported in Static Analyzer flow
    AVSREQ-209195 ELAB_SV Allow events in register status computation
    AVSREQ-208344 ELAB_SV UDP needs to be optimized in static analysis flow.
    AVSREQ-208182 ELAB_SV Elaboration internal error in customer design
    AVSREQ-208063 ELAB_SV "OR" gate is required to be supported in Static Analyzer flow
    AVSREQ-208019 ELAB_SV Customer design stops responding in a legitimate wait statement.
    AVSREQ-208008 ELAB_SV Buffer is required to be supported in Static Analyzer flow
    AVSREQ-207569 ELAB_SV Simulation behavior diff in the enclosed testcase with static analysis.
    AVSREQ-205603 ELAB_SV Static analysis needs to be extended for nets of modules
    AVSREQ-205573 ELAB_SV Task/ function's logical deadcoding should be enhanced for the enclosed testcase
    AVSREQ-205030 ELAB_SV Tasks should be considered in dynamic stuck at value computation.
    AVSREQ-204636 ELAB_SV Static analysis needs to be extended for registers of modules
    AVSREQ-204569 ELAB_SV unexpected NOTDOT error in customer environment
    AVSREQ-202716 ELAB_SV *E, TMPSPC: elaboration failed because of multi-dimension array, such as 4~5 dimension.
    AVSREQ-201098 ELAB_SV Tool exits unexpectedly during UVM elaboration
    AVSREQ-200164 ELAB_SV "new" function is not getting deadcoded during static analysis flow
    AVSREQ-200116 ELAB_SV Support of Always block in dynamic stuck at value computation
    AVSREQ-200106 ELAB_SV xmelab: *F,INTERR: INTERNAL EXCEPTION
    AVSREQ-199890 ELAB_SV xmelab: *E TYCMPAT with UVM config set calls when interface array is used
    AVSREQ-199847 ELAB_SV xmelab: *F,INTERR: INTERNAL EXCEPTION with MESSAGE: sv_seghandler - trapno -1 addr(0x155849e15800)
    AVSREQ-198019 ELAB_SV *E,TYCMPAT mailbox put method argument and mailbox parameter do not have equivalent types on instance
    AVSREQ-197007 ELAB_SV tool is not generating the "tb_sim" snapshot for encrypted design
    AVSREQ-194401 ELAB_SV Indago stops responding after a point when running interactively
    AVSREQ-190294 ELAB_SV $typename not resolving user types
    AVSREQ-185710 ELAB_SV Provide Warning ZZZZ packages lib1.pkg (file,line of package declaration), lib2.pkg (file,line of package declaration),. libn.pkg (file,line of package declaration)have the same package name and are different
    AVSREQ-154298 ELAB_SV xmelab: *E,NOTDOT is not relaxed with -vlogcontrolrelax
    AVSREQ-144009 ELAB_SV Facing NOTDOT error at elaboration stage
    AVSREQ-208439 ELAB_SV_VHDL multiple sources for unresolved signal on a clock net in SV-VHDL hierarchy.
    AVSREQ-206429 ELAB_SV_VHDL unexpected *E, CSGMSS when switching from 23.03 to latest AGILE
    AVSREQ-205225 ELAB_SV_VHDL xmelab: *F,INTERR: INTERNAL EXCEPTION with MESSAGE: nettmp_vhdl_defval - unexpected nettmp_boundary_aca
    AVSREQ-203498 ELAB_SV_VHDL incorrect value on SV-> vhdl enum oomr when number of enumeration items are > 256
    AVSREQ-203497 ELAB_SV_VHDL incorrect value on SV-> vhdl enum oomr when number of enumeration is > 128 and <256
    AVSREQ-166906 ELAB_SV_VHDL Does MXINDR message point to an illegal construct?
    AVSREQ-210618 ELAB_TBE Degradation in inca/src/libs/astlib/vexlib* APIs due to C++ conversions
    AVSREQ-210617 ELAB_TBE Degradation in inca/src/libs/astlib/vexlib* APIs
    AVSREQ-204396 ELAB_VHDL xmelab unexpectedly exit with MESSAGE: astu_enum_itoe - n too large -64/9
    AVSREQ-204900 ESW_DOC ESWD Documentation update needed
    AVSREQ-200950 FUNC_SAFETY XFS 23.07.072 is missing fault detection in serial mode (concurrent seems okay)
    AVSREQ-211474 FUNC_SAFETY_CONCURRENT Bug in handling nested for-loop
    AVSREQ-208370 FUNC_SAFETY_CONCURRENT Annotation mismatch between serial and concurrent in testcase with NBAs
    AVSREQ-207629 FUNC_SAFETY_CONCURRENT incorrect fault annotation with CDN_FAULT_CLKTREE enabled
    AVSREQ-207146 FUNC_SAFETY_CONCURRENT simulation ended unexpectedly
    AVSREQ-205361 FUNC_SAFETY_CONCURRENT fix memory leak in memory fault root update
    AVSREQ-203095 FUNC_SAFETY_CONCURRENT Unsupported constructs in a task are hit despite block is not executed
    AVSREQ-202235 FUNC_SAFETY_CONCURRENT Remove limitations on LHS of NBAs with timing-controls on RHS
    AVSREQ-147049 FUNC_SAFETY_CONCURRENT Separate the FO and CO detection messages amount limit
    AVSREQ-208322 FUNC_SAFETY_ELAB Support to instrument the fault on indexed part-select type coding style
    AVSREQ-207344 FUNC_SAFETY_ELAB Removal of internal wires within the code blocks from fault instrumentation
    AVSREQ-207340 FUNC_SAFETY_ELAB Removal of memory blocks from fault instrumentation
    AVSREQ-204958 FUNC_SAFETY_ELAB Tool unexpectedly exits during xmelab while running DFI campaign
    AVSREQ-203147 FUNC_SAFETY_ELAB *F,INTERR occurs with fault_alpha_rtl
    AVSREQ-135136 FUNC_SAFETY_ELAB xmelab -fault_lib_mfile couldn't support liberty cell format ("cell_name")
    AVSREQ-210443 FUNC_SAFETY_HIER_EXPORT Xcelium DHE cannot extract the output ports for some module instances (RTL design)
    AVSREQ-208852 FUNC_SAFETY_SIM Issue in RTL Barrier Analysis report
    AVSREQ-208376 FUNC_SAFETY_SIM [Safety] The fatal error during RTL serial mode simulation with 23.11-a071-20231119
    AVSREQ-204235 FUNC_SAFETY_SIM [Safety] The fatal error during xmsim with 23.10-a071-20231008
    AVSREQ-201037 FUNC_SAFETY_SIM fault detected in f_exec after the end of the good sim
    AVSREQ-208925 FUNC_SAFETY_XFSG Need XFSG support split by fault number
    AVSREQ-207259 FUNC_SAFETY_XFSG Ability to specify the time_spec with the XFSG utility to avoid xmsim: *E,FLTNHT
    AVSREQ-205332 GLS_GENERAL tran TRANMAP initial infrastructure submit.
    AVSREQ-204745 GLS_GENERAL Code gen bug uncovered by xform inline at customer site.
    AVSREQ-204283 GLS_GENERAL *F,INTERR: INTERNAL ERROR [Simulation]
    AVSREQ-204246 GLS_GENERAL *F,INTERR: INTERNAL ERROR from customer team
    AVSREQ-203648 GLS_GENERAL Simulation crash seen in 0 ns at tran deposit
    AVSREQ-195561 GLS_GENERAL Customer reported unexpected tool exit at 0 simulation time for timing simulation
    AVSREQ-195060 GLS_GENERAL The simulation result differs with/without -disctran option.
    AVSREQ-192319 GLS_GENERAL Print the initialized value of signals in xminit_log
    AVSREQ-192318 GLS_GENERAL Provide support of Integer data type with xm_nativeinit
    AVSREQ-190697 GLS_GENERAL Support of deposit with xm_nativeinit with an option
    AVSREQ-206231 GLS_PERFORMANCE track updates to the new tranmap feature
    AVSREQ-203220 GLS_PERFORMANCE New SDF changes make elaboration to complete in 36 hours as compared to 2 hours
    AVSREQ-193113 GLS_PERFORMANCE Reducing blurring of simulation time
    AVSREQ-175180 GLS_PERFORMANCE DFT chain simulation is 1.5 times slower than competitor tool
    AVSREQ-204467 GLS_SDF condition signal of $setuphold does not work as expected
    AVSREQ-200656 GLS_SDF automatic optimization makes setuphold violation with condition
    AVSREQ-210168 GLS_TIMING xmelab crash: get_cond_for_the_ele - offset?(4) (GL+SDF)
    AVSREQ-209931 GLS_TIMING SC xmelab crash with -negdelay in DFT simulation
    AVSREQ-207427 GLS_TIMING elab freeze issue during SDF annoation in acg_process
    AVSREQ-206257 GLS_TIMING Tool exits unexpectedly - csfunc unknown wad struct id 'ifs_sss' PTR
    AVSREQ-206255 GLS_TIMING Internal Error in "acg_process" in SDF annotation
    AVSREQ-202650 GLS_TIMING Negative Number displayed for both the No. of Pathdelays and Annotated in the SDF statistics during the elaboration
    AVSREQ-200182 GLS_TIMING Partial wildcard matching support
    AVSREQ-200162 GLS_TIMING xmsdfc took long execution time and big memory
    AVSREQ-199512 GLS_TIMING Timing check for instances can't be turned off using CELLLIB
    AVSREQ-181312 GLS_TIMING Simulation internal error in GLST sim due to NTC-3
    AVSREQ-206744 IP_PROTECT_GENERAL Enhance "-simulation portview"/"-level1autoprotect" for For-generate
    AVSREQ-205988 IP_PROTECT_GENERAL Add Encryption Method Information to xmprotect.log
    AVSREQ-202729 IP_PROTECT_GENERAL MESSAGE: Unexpected signal #11, program terminated (null)
    AVSREQ-201511 IP_PROTECT_GENERAL How to find out which options are used for encrypt design
    AVSREQ-198731 IP_PROTECT_GENERAL xmprotect does not support multi-keys with multiple protection blocks
    AVSREQ-203464 IXCOM xmelab: *F,INTERR: INTERNAL EXCEPTION with OSPI 1Gb model on PTM X2
    AVSREQ-202354 IXCOM xmelab: *F,INTERR: INTERNAL EXCEPTION with OSPI 1Gb model on PTM X2
    AVSREQ-208358 JUPITER_BRIDGE *F,INTERR: INTERNAL EXCEPTION Upon Adding Multicore Options
    AVSREQ-202191 JUPITER_ENGINE Tool unexpectedly exits at the starting of Simulation with message : rts_abrthandler - SIGABRT unexpected violation pc=0x2b542b677387 addr=0xbd100004dec
    AVSREQ-184953 JUPITER_ENGINE Xcelium multi-core has mismatch issue in GLST simulation
    AVSREQ-214075 LP_1801 continuous assignment with OOMR on RHS fails to corrupt during power down
    AVSREQ-213159 LP_1801 intermittent xcelium crash
    AVSREQ-211405 LP_1801 E,RVNIMP1: [LPS] The system task $partial_on_translation for CPF is not implemented yet
    AVSREQ-211086 LP_1801 lps_lib2upf_override_ext should be updated to handle liberty internal power driver
    AVSREQ-210541 LP_1801 NY LP: Enhancement to provide auto AON module include file
    AVSREQ-209152 LP_1801 lps_*_force_reapply is not allowing to assign value from RHS to LHS, when RHS has an expression with ternary operator
    AVSREQ-208383 LP_1801 [LPS] 1st implementation step in support "add_supply_state"
    AVSREQ-208221 LP_1801 SNTCONW check should be ported to 23.03 Green
    AVSREQ-208043 LP_1801 change name of assert_always_on_attribute
    AVSREQ-207587 LP_1801 Illegal corruption of an output reg when current PD is FULL ON and parent PD is COA
    AVSREQ-207576 LP_1801 request to give a message for the signals being forced also connected with CLN
    AVSREQ-207439 LP_1801 Why xcelium does not do the force operation after power up?
    AVSREQ-207321 LP_1801 need option to disable is_pad functionality in liberty
    AVSREQ-207125 LP_1801 elab stops working - pwr_mark_delayed_seg
    AVSREQ-206990 LP_1801 Xcelium needs to support set_isolation -clamp_value lower-case 'z'
    AVSREQ-206585 LP_1801 Can upfSupplyStateE enum in upf_package in install be changed to logic[1:0] instead of default int
    AVSREQ-206452 LP_1801 MULSPLY soft error for HDL connection to liberty cell, lib dir: inout, hdl dir:input
    AVSREQ-206450 LP_1801 Spurious NORPCN Soft Error for liberty p/g pin with backup_power attribute
    AVSREQ-206105 LP_1801 supply port declared as input not working as expected
    AVSREQ-205710 LP_1801 xmelab: *SE,MDNTFND: [LPS] No IEEE 1801/design object is found in set_design_attributes
    AVSREQ-205641 LP_1801 R&D: LIB cell inside PA model (No UPF/Liberty)
    AVSREQ-205541 LP_1801 Unexpected X in lpx sim
    AVSREQ-205428 LP_1801 Simulation failure with LPS
    AVSREQ-204896 LP_1801 *SE,ILLOBJU is reported for an argument of "-model" option in UPF command "set_port_attributes … -is_analog"
    AVSREQ-204868 LP_1801 Output from Std cell in a PA module goes to x in middle of simulation
    AVSREQ-204232 LP_1801 [-lps_is_pad_ft_check] When the tool changes "is_pad: false" to "is_pad: true", please output the warning message.
    AVSREQ-204183 LP_1801 elab error E,ISOEQPC when running with lps_multi_iso
    AVSREQ-204175 LP_1801 elab exits unexpectedly when running with both flag lps_iso_elem_precedence_on and lps_multi_iso
    AVSREQ-203402 LP_1801 $link_driver_simstate_change enhancement request to accept parameter string input
    AVSREQ-203298 LP_1801 driving Global always on for P/G pins of liberty cells in DSS
    AVSREQ-201757 LP_1801 Incorrect description of LIBANP warning message
    AVSREQ-201212 LP_1801 NEW FLOW: LP liberty in compile stage - new compile error Mixing of ansi & non-ansi style
    AVSREQ-201141 LP_1801 elaboration exits unexpectedly with MESSAGE: pwrCrossCheckRtnObjects_self
    AVSREQ-200437 LP_1801 Zero delay loop is causing a stall in the simulation
    AVSREQ-200236 LP_1801 [SIM_PERFORMANCE] Xcelium reports internal exception when using lps_cov option
    AVSREQ-200137 LP_1801 Record UPF commands file's relative path to XLM directory
    AVSREQ-200074 LP_1801 indago probe crashing during sim time
    AVSREQ-199879 LP_1801 elab get stuck in pwrImCrtUpf function
    AVSREQ-199828 LP_1801 Xcelium doesn't update the value in initial block
    AVSREQ-199798 LP_1801 *F,SZTOLG is faced only in Power-Aware Simulation
    AVSREQ-199758 LP_1801 [LPS] Initialize un-driven supply_net_type input ports to 0
    AVSREQ-198842 LP_1801 change default direction of Liberty internal_power / internal_ground to output
    AVSREQ-198312 LP_1801 Elaboration failures (ILLCCND) for -isolation_signal
    AVSREQ-197687 LP_1801 UPF: nested struct causing "NOHRPTH" soft error for Iso and Ret Strategy
    AVSREQ-197585 LP_1801 SIGSEGV crash
    AVSREQ-197301 LP_1801 xmelab: *N,FOOESR: [LPS] The find_objects command returns no objects
    AVSREQ-196837 LP_1801 LP - force in interface doesn't work all time
    AVSREQ-194425 LP_1801 [MTK-LPS] Xcelium simulated signal value is different inside / outside the isolation cell
    AVSREQ-194129 LP_1801 issue a warning if isolation is missing on SV interface due to variable assignment
    AVSREQ-193337 LP_1801 xmelab:*SE,EMTELE with member of packed struct as port in find_object
    AVSREQ-192427 LP_1801 Extend lps_upf2lib_override to allow parent liberty override
    AVSREQ-191746 LP_1801 power switch in RTL and UPF with ack_port leads to APMDRV
    AVSREQ-189928 LP_1801 SV attribute for assertion control in HDL override CAC
    AVSREQ-189702 LP_1801 Unexpected compile with -lps_upfpkg_auto_compile_off
    AVSREQ-188124 LP_1801 Enhance -lps_lib_pg_logic to support supply_net_type
    AVSREQ-175238 LP_1801 Indago doesn't annotate the UPF if there is a backslash "\"
    AVSREQ-171925 LP_1801 CUOOMR : with LPS simulation only.
    AVSREQ-170803 LP_1801 OOMR on vhdl port is unsupported with LP 1801
    AVSREQ-146974 LP_1801 discrepancies seen in -lps_1801_msg generated logfile
    AVSREQ-204299 LP_BUILD_PERF Build performance degradation with 23.03 due to 'Low Power - after pwrImDmnStructTwo'
    AVSREQ-200352 LP_BUILD_PERF 7x build time with LP compared to RTL only
    AVSREQ-209441 LP_CLONE XPROP: Simulation overhead with xmclone builds
    AVSREQ-209331 LP_CLONE Unexpected assertion failure with xmclone
    AVSREQ-202628 LP_CLONE LPX xmclone simulation performance
    AVSREQ-186892 LP_INFO_MODEL_AND_QUERY Add support for MODEL INFORMATION's UPF_ELEMENTS in RET
    AVSREQ-186891 LP_INFO_MODEL_AND_QUERY Add support for MODEL INFORMATION's UPF_CLAMP_VALUES
    AVSREQ-213452 LP_ISOLATION *SE, NOISELE on LPX design
    AVSREQ-212023 LP_ISOLATION NOISELE seen in 23.09 but not in 23.03
    AVSREQ-207401 LP_ISOLATION Unexpected behavior when order of power domains creation is changed
    AVSREQ-203412 LP_ISOLATION XRIO support for -lps_multi_iso
    AVSREQ-203283 LP_ISOLATION request to remove -lps_isoruleopt_warn from XRIO
    AVSREQ-202115 LP_ISOLATION request to support multi-iso in XRIO flow
    AVSREQ-201880 LP_ISOLATION getting NOISELE error in xrio flow even when the signal exist
    AVSREQ-200254 LP_ISOLATION POC - change OOMR evaluation on isolated-self output ports to post isolated values
    AVSREQ-194074 LP_ISOLATION XRIO support for back-to-back iso on same port
    AVSREQ-194073 LP_ISOLATION support for location field in xrio_file
    AVSREQ-192605 LP_ISOLATION Implementation of the full -no_isolation semantics for path-based analysis
    AVSREQ-187065 LP_ISOLATION Domain: NONE is filtering domain boundary out of isolation strategy
    AVSREQ-209789 LP_LIBERTY MESSAGE: sv_seghandler - trapno -1 addr((nil))
    AVSREQ-207735 LP_LIBERTY signal change from 'z' to '0' in new flow of compile liberty (LP)
    AVSREQ-206633 LP_LIBERTY xmelab: *SE,CDBERR: [LPS] Can't open the liberty database file (./dir/test1.cdb) for reading.
    AVSREQ-206133 LP_LIBERTY Enhancement request for *NOTEMFL message and a feature of checking existence of statistic report in xmlib2cdb.log file
    AVSREQ-206124 LP_LIBERTY internal when using soi library
    AVSREQ-206057 LP_LIBERTY xmvlog E,NOAUTO in new lps compile liberty flow
    AVSREQ-203023 LP_LIBERTY LP new liberty flow: when -lps_pa_strict switch is used, this module gets classified as nonPA instead of PA
    AVSREQ-199496 LP_LIBERTY *E,NOPORT error on models without any data/pg port
    AVSREQ-197040 LP_LIBERTY xmlib2cdb to generate statistic information on processed Liberty files
    AVSREQ-196753 LP_LIBERTY New Flow: ANSI style declaration issue
    AVSREQ-181426 LP_LIBERTY xmelab: *E,PDFERR: [LPS] Error encountered in parsing power down function
    AVSREQ-196024 LP_MSIE xmelab: *F,STDTPE: [LPS] on MSIE
    AVSREQ-204685 LP_RETENTION xmelab - CSI: *F,INTERR: INTERNAL EXCEPTION MESSAGE: dto_num_scalars - unexpected kind (513)
    AVSREQ-206886 LP_SIM_PERF enable debug logging for perf issue
    AVSREQ-203105 LP_SIM_PERF xmelab: *F INTERNAL EXCEPTION - sv_seghandler - trapno -1 addr((nil))
    AVSREQ-201590 LP_SIM_PERF Unexpected tool exit seen in 2303v003 related to en_vaca_opt
    AVSREQ-200635 LP_SIM_PERF elab exits unexpectedly finalize_vhdl_net LPS build - due to en_vaca_opt
    AVSREQ-199152 LP_SIM_PERF PAD value does not update when POWER is changed from OFF to ON
    AVSREQ-198618 LP_SIM_PERF assignment sometimes not executed when lps_vcorr_opt is used
    AVSREQ-194668 LP_SIM_PERF pwr_calldopower is consuming high sim time in customer environment
    AVSREQ-210496 MCE_BUILD_FAILURE xmelab: *F,MCEASRT: mcebuild internal error
    AVSREQ-195819 MCP_ELAB Support DSS/MSIE in MCP
    AVSREQ-211491 MCP_SIM Enhance MCP P2P compilation stage report
    AVSREQ-211134 MCP_SIM Cannot merge MCP coverage DBs with different checks but same DUT/SDC
    AVSREQ-210733 MCP_SIM [MCP] Coverage report : New format html report missing some violations
    AVSREQ-210454 MCP_SIM [MCP] Coverage report : -setenv cmdwise_report=1 cannot work correctly
    AVSREQ-208872 MCP_SIM [MCP] | Change "MCP violation" name in log/report to avoid misleading
    AVSREQ-202344 MCP_SIM MCP_PROD: Support MCP coverage metrics
    AVSREQ-175250 MCP_SIM Merge MCP and Stability Checking Coverage reports
    AVSREQ-166825 MCP_SIM MCP and Stability Checking Coverage report readability
    AVSREQ-204704 MCS_DEV MCS | Tool crash scheduled call back to queues
    AVSREQ-204560 MCS_DEV MCS | Tool crash with assertion failed messge
    AVSREQ-213467 MSIE_ELAB Tool Crash in DSS flow while switching the XLM release
    AVSREQ-210278 MSIE_ELAB *E,STIUNS- Unsupported datatype for parameter at partition boundary
    AVSREQ-209558 MSIE_ELAB xmelab *F, INTERR with -betamsieelab
    AVSREQ-207801 MSIE_ELAB xcelium automsie flow stops unexpectedly
    AVSREQ-207729 MSIE_ELAB xmclone/1/2/3/4/5 option (even implicit min_pct option) should not get applied in defalult MSIE Genhref skip clones optimization
    AVSREQ-207394 MSIE_ELAB Create an option -betamsieelab that should contain all MSIE elab options lying outside of -msieunlock all
    AVSREQ-207120 MSIE_ELAB Provide better verbosity for genhref skip clone phase in genhref log
    AVSREQ-207044 MSIE_ELAB Provide AutoMSIE generated partition file details also in Lib Cell View format
    AVSREQ-206882 MSIE_ELAB Why does -XMSIE_COLLECT_CUSCOPE_DEP create extra incrtops?
    AVSREQ-201563 MSIE_ELAB xmls exits with signature "ifmgr - pt_build() - size calculated incorrectly"
    AVSREQ-200860 MSIE_ELAB Partitioner improvement needed for shared multi-compile cuscope environment
    AVSREQ-200788 MSIE_ELAB AutoMSIE Partitioner generates sub-optimal partitioning in the presence of parameterized interface ports
    AVSREQ-199923 MSIE_ELAB Partitioner takes huge time, option -XMSIE_EXCLUDE_DEFPARAMS needed with -automsie
    AVSREQ-199921 MSIE_ELAB Elaboration memory blowup at incremental after checkpoint after ie_set_snapshots
    AVSREQ-198215 MSIE_ELAB Getting BILCNF error in multi-step MSIE with V2K
    AVSREQ-198069 MSIE_ELAB False *W,DSSSIZ reported for '0 on MSIE boundary
    AVSREQ-194209 MSIE_ELAB Enhance port connection support so that DSSVAR/DSSUSZ errors get resolved
    AVSREQ-190270 MSIE_ELAB Single xrun DSS flow genhref does not get msie genhref skip clone optimization applied
    AVSREQ-182584 MSIE_ELAB AutoMSIE gives xmelab: *E,APTFAP (reg_decode.sv,9|60): Too few assignment pattern items (1) for given assignment (expecting 2) [SystemVerilog].
    AVSREQ-156242 MSIE_ELAB Improve error message when there is a mismatch between instantiated component and its entity
    AVSREQ-207388 MSIE_PERFORMANCE Genhref partitioner checkpoint is taking 700s
    AVSREQ-207119 MSIE_PERFORMANCE Make -setenv AMSIE_CLONING_LIMIT=2048 -xmsie_replicated_top_lower_limit 0.001 default in genhref skip clone phase
    AVSREQ-205892 MSIE_PERFORMANCE Add -msieunlock simperf to newperf
    AVSREQ-205684 MSIE_PERFORMANCE 16 minutes degradation in genhref time on customer design
    AVSREQ-203399 MSIE_PERFORMANCE Make -msieunlock genhref_defer_doaccess options default
    AVSREQ-202865 MSIE_PERFORMANCE Enable genhref skip clone optimizations for PIP cases
    AVSREQ-202280 MSIE_PERFORMANCE Reduce AutoMSIE genhref time of checkpoint CHECKPOINT 633 (after cu_optimize::cu_optimize_gates+cu_opt_pplms_pass1+cu_opt_prune_graph)
    AVSREQ-200976 MSIE_PERFORMANCE Make -msieunlock genhref_skip_clones_phase2 default
    AVSREQ-186924 MSIE_PERFORMANCE Make partitioner intelligent with making sure that we don't have big long pole primary
    AVSREQ-207393 MSIE_SIMULATION Create an option -msieunlock betasimperf that should contain all MSIE simperf options
    AVSREQ-205731 MSIE_SIMULATION Getting use of -nospecify switch warning while using -genhref switch in GLS environment.
    AVSREQ-198895 MSIE_SIMULATION Single-step MSIE simulation doesn't behave like non-MSIE simulation
    AVSREQ-196689 MSIE_SIMULATION Flop not responsive to posedge in non-xprop sim
    AVSREQ-199630 MULTI_CORE_ARCH -mce with process-based save and restart
    AVSREQ-209633 PARSE_PERF File with large number of OOMRs slows down parse
    AVSREQ-207304 PARSE_PERF xmvlog performance issue
    AVSREQ-208153 PARSE_PRAGMA Additional coverage support for other vendor translate off/on syntax with option: -enable_cov_pragma_ext
    AVSREQ-200217 PARSE_PRAGMA Support for coverage pragmas using a different tool's syntax with option: -enable_cov_pragma_ext
    AVSREQ-211540 PARSE_SV Change ESMFMAX from warning to note
    AVSREQ-211515 PARSE_SV BADCON on nested foreach
    AVSREQ-210048 PARSE_SV Xcelium reports internal exception in xmsim stage
    AVSREQ-209154 PARSE_SV Invalid NOUNAD
    AVSREQ-209078 PARSE_SV New incorrect NOUNAD warnings in out-of-block declarations
    AVSREQ-207689 PARSE_SV Unexpected *E,UNDIDN of variable coming from imported package
    AVSREQ-206354 PARSE_SV Enhance xmvlog/xrun to give a warning on rand modifier in packed struct
    AVSREQ-206294 PARSE_SV Support under ENV CADENCE_ENABLE_AVSREQ_63188_PHASE_1 made default for parameterized classes
    AVSREQ-205991 PARSE_SV Support for typed constructor calls should be enabled by default
    AVSREQ-205846 PARSE_SV vlogcontrolrelax NOTDOT does not work if the hierarchical path contains genblock labels
    AVSREQ-205245 PARSE_SV Erroneous PMRTTF for nested type params
    AVSREQ-204886 PARSE_SV Follow-on from AVSREQ-202376, -include_file_opt needs repair
    AVSREQ-204837 PARSE_SV Incorrect NOUNAD warning in out-of-block declaration
    AVSREQ-204565 PARSE_SV *E, NOTDIR reported in xcelium agile version 23.05.071
    AVSREQ-204320 PARSE_SV Text refs are missing on the design, the source code window was blank
    AVSREQ-204092 PARSE_SV *F,INTERR: INTERNAL EXCEPTION in xmvlog (64) - MSG : Unexpected signal #11, program terminated (null)
    AVSREQ-204029 PARSE_SV Wrong CUVMPW warning for specific case of port connection with packed array
    AVSREQ-203800 PARSE_SV xcelium provides bad file paths when -autofetch is in use
    AVSREQ-203692 PARSE_SV XLM Compilation stuck
    AVSREQ-202745 PARSE_SV xmelab E,FUNOTR omitting parens from clone() call
    AVSREQ-202612 PARSE_SV xmvlog: *E,NOTPAR: Illegal operand for constant expression [4(IEEE)].
    AVSREQ-202349 PARSE_SV EXPENC error for extra semi-colon
    AVSREQ-201985 PARSE_SV Enhance -vlogcontrolrelax DUPIDN for classes and virtual interfaces
    AVSREQ-201136 PARSE_SV Getting SCWNPO error in customer design
    AVSREQ-200921 PARSE_SV xmvlog Unexpected signal #11, program terminated (null)
    AVSREQ-200813 PARSE_SV variable declaration shows BADQAL error
    AVSREQ-200397 PARSE_SV Productization of scope randomize support for class select and struct member select
    AVSREQ-200371 PARSE_SV enhancement for warning message from the -enable_cu_deppkg_opt optimization
    AVSREQ-200366 PARSE_SV *E,NOBSOS (test.sv,11|15): Bit-select operator cannot be applied to scalar
    AVSREQ-200178 PARSE_SV include statement missed when using -enable_include_file_opt
    AVSREQ-200149 PARSE_SV $bits(param_type) incorrect value for parameter when being assigned to a localparam
    AVSREQ-199084 PARSE_SV support for "soft" constraint in std.randomize()
    AVSREQ-197410 PARSE_SV Internal Exception: vst_identifier - CLASS_SELECT member default, class 791
    AVSREQ-196640 PARSE_SV Textref is missing for uvm_macro inside generate statement
    AVSREQ-196329 PARSE_SV Error with variable declaration
    AVSREQ-196126 PARSE_SV Xcelium internal error in xmvlog using -scu switch
    AVSREQ-196124 PARSE_SV *F,INTERR: INTERNAL EXCEPTION - sv_seghandler - trapno -1 addr(0x42014101)
    AVSREQ-194179 PARSE_SV xmvlog: *E,BDSTLO when string is used with case equality operator id_dev(this.dev_ut)) !== "CY14V101QS" [Xcelium migration]
    AVSREQ-194177 PARSE_SV Missing textrefs for index and signal of interface referenced in macro within generate statement
    AVSREQ-194156 PARSE_SV E,ILLNHI when enabling type/value param support without defaults
    AVSREQ-192581 PARSE_SV apx - can't abstract pointer error message during xmvlog
    AVSREQ-190598 PARSE_SV Support for *E, SVPKSN error
    AVSREQ-190555 PARSE_SV Internal Exception: vst_identifier - CLASS_SELECT member default, class 791
    AVSREQ-189837 PARSE_SV xmvlog is failing with NOTDIR due to -enable_include_file_opt
    AVSREQ-189458 PARSE_SV Expand -vlogctrlrelax DUPIDN support
    AVSREQ-189116 PARSE_SV rtl compilation failure with 23.02.a071
    AVSREQ-187679 PARSE_SV EXPLPA error when creating var
    AVSREQ-185999 PARSE_SV *E,APNMBR caused by name lookup
    AVSREQ-178062 PARSE_SV Xcelium cannot support soft constraints in std randomize
    AVSREQ-176836 PARSE_SV *E,EXPNBA expecting a non-blocking assignment in this enhanced for loop initializer or incrementer specification.
    AVSREQ-174578 PARSE_SV CU scope declaration CUDCLR verbosity log with -parseinfo cuscope_verbose need to be made better
    AVSREQ-172178 PARSE_SV Unable to downgrade NOTDOT with -vlogcontrolrelax NOTDOT.
    AVSREQ-167051 PARSE_SV XLM fails to recognize valid syntax (struct elements of foreach index)
    AVSREQ-165999 PARSE_SV Error while using soft constraint inside randomize
    AVSREQ-164733 PARSE_SV soft constraint in std::randomize with call in class
    AVSREQ-147225 PARSE_SV xmvlog: *E,BDSTLO
    AVSREQ-141472 PARSE_SV xmvlog: *E,SVPKSN: The single-bound form of a range is only allowed for array (i.e., unpacked) dimensions.
    AVSREQ-139713 PARSE_SV SVPKSN, The single-bound form of a range is only allowed for array (i.e., unpacked) dimensions.
    AVSREQ-132296 PARSE_SV BDSTLO, string can't be used with case equality operator
    AVSREQ-114708 PARSE_SV xmvlog: *E,BDSTLO (Teoracle.sv,29|11): Illegal type string left operand to !== (case inequality) operator [SystemVerilog].
    AVSREQ-114518 PARSE_SV xmvlog: *E,SVPKSN (lkp.sv,258|93): The single-bound form of a range is only allowed for array (i.e., unpacked) dimensions.
    AVSREQ-111756 PARSE_SV Xcelium gives an error when declaring an array as "type [size] array_name"
    AVSREQ-100425 PARSE_SV DUPIDN error message must reveal the location of the prior definition
    AVSREQ-95846 PARSE_SV VCS supports str === "xyz"
    AVSREQ-93364 PARSE_SV Can't use string in ===
    AVSREQ-93241 PARSE_SV xmvlog error BDSTLO with case inequality operator on strings
    AVSREQ-93073 PARSE_SV support for !== for string inequality
    +–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––- +–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––-
    AVSREQ-93009 PARSE_SV BDSTLO, String cannot be used with equality operator
    AVSREQ-85439 PARSE_SV xmvlog: *E,EXPNBA (tb.sv,8|13): expecting a non-blocking assignment in this enhanced for loop initializer or incrementer
    AVSREQ-80093 PARSE_SV BDSTLO, String cannot be used with equality operator
    AVSREQ-203531 POWERPLAYBACK_GENERAL Power Playback don't dump waveform database / SAIF even POWERPLAYBACK_DUMP_FSDB_* / POWERPLAYBACK_DUMP_SAIF_* are written
    AVSREQ-202488 POWERPLAYBACK_GENERAL PowerPlayback simulation result is different between 2304_e162 and 2309_e707
    AVSREQ-199000 POWERPLAYBACK_GENERAL Power Playback need an option to dump mapping rate log in the simulation directory
    AVSREQ-198115 POWERPLAYBACK_GENERAL PowerPlayback performance is slow behind OT
    AVSREQ-181408 POWERPLAYBACK_GENERAL Power Playback need an option to stop simulation time at replay end time
    AVSREQ-205883 PROFILER_SIM_RUNTIME Simulation stops unexpectedly with "-enable_prof_info" for -rdprofile
    AVSREQ-205340 PROFILER_SIM_RUNTIME Simulation killed due to job overran RAM reservation by 3x
    AVSREQ-197090 PROFILER_SIM_RUNTIME Introduce a warning in xmprof.out telling that the MSIE primary snapshot is built with HREF wild card
    AVSREQ-185918 PROFILER_SIM_RUNTIME Add number of clocks to design summary section at the end of elaboration
    AVSREQ-204173 PROFILER_XPROF Introduce Function/Task View in Summary Profile of Xprof
    AVSREQ-202156 PROFILER_XPROF [Summary Profile Phase 2]: Introduce technology summary section in xprof gui
    AVSREQ-195140 RAND_DEBUG Request to check illegal dist ranges in run-time instead of silently dropping by the solver
    AVSREQ-153863 RAND_DEBUG -xceligen obfuscate obfuscate_names signal name in unconstrained array size warning
    AVSREQ-204287 RAND_FRONT Randomization crash in 23.07.a071 - Same as noticed in 22.09 earlier
    AVSREQ-91559 RAND_GENERAL The option: -svrnc rand_timeout=10 does not work properly when running with iprof
    AVSREQ-204094 RAND_PERFORMANCE Soft constraints 2nd issue during migration
    AVSREQ-205454 RAND_SOLVER std::randomize violates constraint for !(var inside {queue})'
    AVSREQ-204400 RAND_SOLVER Randomization result with std::randomize violates with constraint
    AVSREQ-202822 RAND_SOLVER Checker=2 is changing the randomization return
    AVSREQ-202529 RAND_SOLVER Solver returning inconsistent constrained value
    AVSREQ-202527 RAND_SOLVER RNDITERLIMIT failure caused by else statement not taking effect on the constraint
    AVSREQ-201463 RAND_SOLVER *F,SVRNDE randomization issue
    AVSREQ-201290 RAND_SOLVER Randomization: iteration timeout encountered during qualification
    AVSREQ-102340 RAND_SOLVER IES class.randomize indicates success, but does not satisfy all constraints. - same as CCMPR01362305
    AVSREQ-97295 RAND_SOLVER randomize(null) not working correctly with arrays of handles.
    AVSREQ-195015 SAVE_RESTART_DMTCP xeDebug unable to find snapshot when saving multiple snapshots
    AVSREQ-204374 SAVE_RESTART_GENERAL *W,EOFWR: Could not write to file stdout ( Bad file descriptor ) in PBSR, LSF Background process run
    AVSREQ-210227 SEMANTIC_DIFF semantic diff : -exclude_files and -exlcude_dir not working
    AVSREQ-200852 SIM_EVCD Dump in an unexpected direction in evcd format.
    AVSREQ-200365 SIM_FORCE_RELEASE *E,ASNUSE, Illegal use of a bit-select, part-select, member-select or mda element
    AVSREQ-198394 SIM_FORCE_RELEASE Dumping of detailed information about the "force/release/deposit" command
    AVSREQ-188506 SIM_LICENSE Xcelium license checkout takes a very long time
    AVSREQ-202251 SIM_MCLITE fatal error "Open fail in set cpulocks" when using the Multi-Core Lite
    AVSREQ-211479 SIM_PERFORMANCE 24.02 nightly Elab time degradation as compared to 24.01 RC kit
    AVSREQ-211425 SIM_PERFORMANCE Elaboration Crash from -newperf. -enable_named_port_assoc_opt in specific
    AVSREQ-209993 SIM_PERFORMANCE xmelab: *F,CGFAIL: Code generation failed for one or more modules.
    AVSREQ-209885 SIM_PERFORMANCE XFORM not working on assigns inside generate for the part select to indexed part select conversion
    AVSREQ-209696 SIM_PERFORMANCE ENABLE_STREAM_SHARE causing segmentation fault during simulation: xmsim: *F,INTERR: INTERNAL EXCEPTION with MESSAGE: T(0): sv_seghandler - trapno -1 addr(0x9035992844fe1)
    AVSREQ-209438 SIM_PERFORMANCE if_mgetinfo () accounts to 2% of XMELAB time increase when comparing LATEST AGILE w/ 23.03.v005
    AVSREQ-209407 SIM_PERFORMANCE XFORM not working on assigns inside generate for
    AVSREQ-209391 SIM_PERFORMANCE Simulation stuck at 0ns
    AVSREQ-209247 SIM_PERFORMANCE xmelab stops responding for full chip SOC xcelium/23.11.a071
    AVSREQ-208480 SIM_PERFORMANCE "-ENABLE_ALWAYS_CA" is increasing XMELAB time in latest AGILE when compared to 23.03.v005.
    AVSREQ-208146 SIM_PERFORMANCE Unable to reproduce assertion failure with waves dump, while assertion error is seen without waveform dumping
    AVSREQ-207871 SIM_PERFORMANCE elaboration FATAL - cu_xuafillot - elwait block with no count
    AVSREQ-207868 SIM_PERFORMANCE Always block with continue statement simulation performance optimization
    AVSREQ-207755 SIM_PERFORMANCE -enable_vtw_relax_subport_oomrw converts a logic but does not issue VTWMDR warning
    AVSREQ-207695 SIM_PERFORMANCE Regression failure with newperf (in specific -enable_single_pw)
    AVSREQ-207674 SIM_PERFORMANCE Primary getting rebuilt with autohref.txt generation
    AVSREQ-207163 SIM_PERFORMANCE Xcelium reports assertion fail when event is OFF
    AVSREQ-206792 SIM_PERFORMANCE Tool exits unexpectedly at elab stage with -*_ca_multi_amalg
    AVSREQ-206260 SIM_PERFORMANCE elaboration degradation between 21.07 and 23.04
    AVSREQ-205753 SIM_PERFORMANCE Race issue in PCIE block
    AVSREQ-205749 SIM_PERFORMANCE "-disable_bval_wakeup" makes Simulation log file match with 21.07
    AVSREQ-205265 SIM_PERFORMANCE One or more switch(es) under -newperf umbrella switch caused value update of 2-to-1 Mux in Low Power Simulation
    AVSREQ-204964 SIM_PERFORMANCE Xcelium crash xmelab: *F,INTERR: INTERNAL EXCEPTION
    AVSREQ-204876 SIM_PERFORMANCE always_comb block not getting evaluated
    AVSREQ-204871 SIM_PERFORMANCE rts_abrthandler - SIGABRT unexpected violation pc=0x15555469f277 addr=0x90f400000691
    AVSREQ-204746 SIM_PERFORMANCE Xcelium exits unexpectedly with new version
    AVSREQ-204363 SIM_PERFORMANCE Unexpected elaboration stop observed with latest 23.10 nightly kit with message ": sv_seghandler - SIGSEGV while handling SIGSEGV"
    AVSREQ-204073 SIM_PERFORMANCE Fatal during elab: cu_xuafillot - elwait block with no count
    AVSREQ-203213 SIM_PERFORMANCE A seq. target is not reflected on the LHS of a CA later unless linedebug is used
    AVSREQ-202710 SIM_PERFORMANCE Internal error with message "tl_assign_prune_count - not mapped" with 23.09 kit and -xform CA_and_pes
    AVSREQ-202621 SIM_PERFORMANCE Incorrect behavior of for loop inside always_comb
    AVSREQ-201190 SIM_PERFORMANCE NBA assignment not getting updated due to -enable_prune_reg_always_opt
    AVSREQ-201103 SIM_PERFORMANCE Elaboration time is significantly increased due to pes_roomr, pes_woomr or gprune
    AVSREQ-201089 SIM_PERFORMANCE xmelab *F,INTERR: tds_cleanup
    AVSREQ-199936 SIM_PERFORMANCE Xcelium simulation result is different with / without newperf option
    AVSREQ-199463 SIM_PERFORMANCE Incorrect simulation results due to gprune optimization
    AVSREQ-199167 SIM_PERFORMANCE xrun INTERNAL EXECEPTION
    AVSREQ-198461 SIM_PERFORMANCE perf_analysis gives wrong NOTES.
    AVSREQ-198233 SIM_PERFORMANCE Xcelium asynchronous reset behavior is different with / without noprune
    AVSREQ-198098 SIM_PERFORMANCE Tests failing when -enable_share_aca and -xmclone are used simultaneously
    AVSREQ-197718 SIM_PERFORMANCE Tool unexpectedly exits while working on AVSREQ-196915 and it is also reported by other users
    AVSREQ-197612 SIM_PERFORMANCE incorrect sim behaviour when using -disable_vtw_relax_subport_oomrw
    AVSREQ-196667 SIM_PERFORMANCE GLS SCAN function simulation performance compared to competitors
    AVSREQ-196495 SIM_PERFORMANCE A signal on primary partition is not following its driver from incremental partition
    AVSREQ-194462 SIM_PERFORMANCE xmsim *F,INTERR with MSIE: SIGSEGV on non-blocking assignment
    AVSREQ-192504 SIM_PERFORMANCE Simulation fail with -enable_delbuf_dyndrv in DSS
    AVSREQ-192178 SIM_PERFORMANCE Continuous assignments consuming most of the simulation time
    AVSREQ-192074 SIM_PERFORMANCE Unexpected z value in a forced port
    AVSREQ-187768 SIM_PERFORMANCE Simulation performance tracking for ad10y design in secure chamber
    AVSREQ-184459 SIM_PERFORMANCE Xcelium 18.08-a001 vs. Xcelium 22.12-a071 Performance (simulation time)
    AVSREQ-179064 SIM_PERFORMANCE Enhance VTW to automatically avoid VTWFRC scenarios
    AVSREQ-171488 SIM_PERFORMANCE add ENABLE_FJN_SRANDOM_OPT to newperf
    AVSREQ-206193 SIM_RACE_SOLVER race_detect doesn't work with -mccodegen
    AVSREQ-205770 SIM_SAIF_TCF Customer feedback on AVSREQ-154015: Enhancement request for SAIF for generate block
    AVSREQ-210763 SIM_SV The tool ignores that a library and a cell can both be escaped identifiers when printing library.cell via $display("%l::%m");
    AVSREQ-210057 SIM_SV *W,TRILLVNULL extended help (xmhelp) is not there
    AVSREQ-205521 SIM_SV COD_PCTOSM : internal exception when loading dynamic object attribute in waveforms
    AVSREQ-204537 SIM_SV xmvlog_cg: gq_get_vifc_pib - null vifc_wormhole_handle
    AVSREQ-202360 SIM_SV Simulation exits unexpectedly due to switches -ii_write and -ii_val
    AVSREQ-202258 SIM_SV INTERR error on customer platform
    AVSREQ-201815 SIM_SV End of simulation log not present in smartlog
    AVSREQ-201137 SIM_SV Indago interactive stops unexpectedly when adding register field to waveform
    AVSREQ-198742 SIM_SV abort handler stalls trying license checkin
    AVSREQ-192812 SIM_SV xmsim does not provide an error message when the error happens during __run_exit_handlers
    AVSREQ-189457 SIM_SV Adding classlinedebug is causing a Null Ptr dereference error
    AVSREQ-188796 SIM_SV Driver tracing returns no results for a signal that is defined by a struct type parameter
    AVSREQ-187701 SIM_SV Need better debug messages when xmsim exits w/ 255 exit code due to user C/C++ code
    AVSREQ-177532 SIM_SV xmsim doesn't return to original directory if a SIGABRT is raised in a different path
    AVSREQ-210221 SIM_TCL xmsim: *SE,PNOOBJ error message not printing the complete path
    AVSREQ-206898 SIM_TCL #This is a comment - not working in Xcelium TCL
    AVSREQ-203289 SIM_TCL xterm started from tcl stops with crtl-C
    AVSREQ-200646 SIM_TCL Supressing Soft Error with -xmwarn PNOOBJ is still returning code 1, TCL_ERROR.
    AVSREQ-133756 SIM_TCL Customer testcase crashes for TCL stop commands.
    AVSREQ-209075 SIM_USABILITY In XCELIUM, severity of probe error PRNONE is inconsistent with XRUN option -xmwarn
    AVSREQ-207364 SIM_USABILITY $xm_force is not working and leading to ILLNUM error
    AVSREQ-206179 SIM_VHDL *E,TRINDXC: index constraint violation in VHDL code
    AVSREQ-198073 SIM_VHDL xmsim stops unexpectedly when a file is opened in Source-Browser
    AVSREQ-210924 SIM_VHPI VHDL alias to signal in waveform
    AVSREQ-200914 SIM_VHPI VHDL elsif / else not showing the generate hierarchies in Simvision
    AVSREQ-199837 SIM_VHPI getting FATAL: We are calling up again xmsim: *F,SIGUSR: Unix Signal SIGSEGV raised from user application code with cocotb
    AVSREQ-210698 SIM_WRITE_METRICS xmsim exits without invoking vm_srmp, fails to dump cdns_sim.vsof
    AVSREQ-207317 SIMVISION_CONSOLE Error "invalid command name "proxy4 handleEvents sga::i"" in Simvision
    AVSREQ-181860 SIMVISION_GENERAL Color mismatch between trace and trace legend in simvision
    AVSREQ-208054 SIMVISION_MS SimVisionMS: OOMR Browser - Opening OOMR Browser causes Xcelium to crash
    AVSREQ-207571 SIMVISION_MS On complex net VDD conn command simvision freezes
    AVSREQ-206771 SIMVISION_MS SimVisionMS: Browse Currents - Mode=down on top lvl net crashes Spectre
    AVSREQ-195372 SIMVISION_MS SimVisionMS: Browse Currents - when not watching live data, CB displays all nets and values missing regardless of filtering preferences
    AVSREQ-192471 SIMVISION_MS SimVisionMS: Browse Currents - Different current values from mode Down to Global
    AVSREQ-191709 SIMVISION_MS Unable to use AMS debug option using top VHDL
    AVSREQ-190439 SIMVISION_MS SimVision MS not working for VHDL-SPICE TB: :Error: VPI NOFNAM
    AVSREQ-187699 SIMVISION_MS Rendering of transistors in schematic tracers with drain towards up, source towards down, gate towards left
    AVSREQ-183394 SIMVISION_MS Delay with SimVisionMS command line runs
    AVSREQ-183009 SIMVISION_MS SimVision not responsive after starting an AMS simulation and loading the customer-specific TCL code
    AVSREQ-181982 SIMVISION_MS Flow probe is not added to waveform window
    AVSREQ-157470 SIMVISION_MS SimVisionMS : Export Browse Currents Sidebar results to CSV/XLSX
    AVSREQ-199845 SIMVISION_WAVEFORMS Simvision waveform not displaying associative array entries
    AVSREQ-207559 SPECMAN_COV Unjustified WARN_UNGRADABLE_ITEM
    AVSREQ-205526 SPECMAN_COV IMC Segmentation error when customer performs merging or generates reports.
    AVSREQ-202661 SPECMAN_COV Assertion Cover status on merged IGNORE severity passing and failing checks
    AVSREQ-199937 SPECMAN_COV Option to exclude cover groups for non-instantiated types SPMN
    AVSREQ-186063 SPECMAN_COV Coverage of C code called from Specman
    AVSREQ-204297 SPECMAN_E undefined symbol: var_opt_core_in_command_line
    AVSREQ-194064 SPECMAN_E add type representing constant
    AVSREQ-194063 SPECMAN_E get all "participants in methods params"
    AVSREQ-194062 SPECMAN_E Separate regular event from sampling event
    AVSREQ-194061 SPECMAN_E query whether an entity is rhs or lhs
    AVSREQ-194060 SPECMAN_E method variable entity
    AVSREQ-205524 SPECMAN_GENERAL fast_gzopen libz symbol is exported publicly from Specman, causing clashes if libz.so is used in the same process
    AVSREQ-204947 SPECMAN_GENERAL xmsim crashes when Verisium Debug starts in interactive debug
    AVSREQ-193186 SPECMAN_GUI Specview/Simvision GUI help about selection pop-up banner window gives an error about missing patents.txt file
    AVSREQ-200609 SPECMAN_INDAGO [Specman side] open gRPC sockets in Indago interactive mode
    AVSREQ-199061 SPECMAN_INTEF Trouble to connect indexed port to unbounded VHDL-Array
    AVSREQ-194893 SPECMAN_INTEF Internal error at assertion call-back registration using encrypted module
    AVSREQ-211289 SPECMAN_METHODOLOGY Memory leak using 'do sequence on driver'
    AVSREQ-201077 SPECMAN_UVM_E Passing macro instance to uvm_build_config macro fails
    AVSREQ-211916 SPECTRE_AMSD Support Local Params/Local nodes in if/else block
    AVSREQ-211125 SPECTRE_AMSD http://ccmsutil.cadence.com/cgi-bin/ccrprint.cgi?ccrId=2926198
    AVSREQ-208151 SPECTRE_AMSD put sv_asserts.txt in the xmlibdirpath directory
    AVSREQ-208124 SPECTRE_AMSD xmsim fatal internal error when using tcl command get_analog_param when running a pure digital sim
    AVSREQ-205879 SPECTRE_AMSD Setting analog solver off at t=0 using $cds_analog_off gives incorrect results
    AVSREQ-205874 SPECTRE_AMSD ANALOGONOFF messages report incorrect time values
    AVSREQ-205657 SPECTRE_AMSD Improve synchronicity between Spectre FX and Xcelium
    AVSREQ-201583 SPECTRE_AMSD Running AMS PBSR restart from a save snapshot that is read only results in incorrect read only xcelium.d hierachy in the restart area
    AVSREQ-200807 SPECTRE_AMSD AMS UNL Incorrectly Netlists the pow() Function
    AVSREQ-194428 SPECTRE_AMSD Overriding a string parameter by a field out of a string array gives xmsim error
    AVSREQ-186889 SPECTRE_AMSD Usage of $sformatf inside a generate statement with for loop causes segmentation fault
    AVSREQ-186259 SPECTRE_AMSD AMS interactive: Support Flex 2.0 and Homogenous-PBSR
    AVSREQ-185635 SPECTRE_AMSD Unexpected SFE-23 error from Spectre when instantiating arrays of cells in multi-step xrun
    AVSREQ-184978 SPECTRE_AMSD Flex 2.0 and PBSR: re-booting the analog solver after a warm restart causes the simulation to freeze
    AVSREQ-176117 SPECTRE_AMSD parameterize vsup of ie card with AXUM use-model
    AVSREQ-163242 SPECTRE_AMSD Internal exception error during simulation when having an uninitialized 'modelName' parameter and undefined 'modelName'
    AVSREQ-197032 SR_BACKDOOR Using -xceligen backdoor_output_file= with non-existent directory silently fails
    AVSREQ-197030 SR_BACKDOOR using -ml and -xceligen backdoor_output_file gives an error on empty backdoor_trace.txt
    AVSREQ-197023 SR_BACKDOOR -xceligen backdoor_output_file crashes
    AVSREQ-211820 SR_XEML Reduce NOCOVML from error to warning for failure targeting flow
    AVSREQ-207138 SR_XEML Add ability to turn off cross bins
    AVSREQ-205894 SR_XEML Fix problem in SGE DRM adapter
    AVSREQ-201512 SR_XEML Xcelium ML: need DRM support Sun Grid
    AVSREQ-200890 SR_XEML XMML DRM user command
    AVSREQ-207114 SV_ALL_OBSOLETE Used -plussv and still can't solve this error(*E,NOTPAR)
    AVSREQ-203130 SV_CG_PERF xmvlog_cg exits unexpectedly with the latest agile builds
    AVSREQ-196355 SV_CG_PERF wall time randomly 3x high on a checkpoint
    AVSREQ-208860 SV_CODEGEN xmvlog_cg : *F, INTERR: INTERNAL EXCEPTION -> gq_setwait - null/!SVHR VXLF_HEAP cached t_t
    AVSREQ-207272 SV_CODEGEN xmvlog_cg : *F, INTERR: INTERNAL EXCEPTION -> gq_setwait - null/!SVHR VXLF_HEAP cached t_t
    AVSREQ-206872 SV_CODEGEN Customer test failed after moving from 22.03.v006 to 23.03.v004
    AVSREQ-206606 SV_CODEGEN xmelab : *F, INTERR, INTERNAL EXCEPTION, vxt_qualify_for_ii_ips_flow
    AVSREQ-204178 SV_CODEGEN Customer design shows assertion error with static analyzer
    AVSREQ-201324 SV_CODEGEN Compiler stops responding in 2303-002 : gq_cfjb - loop back corruption
    AVSREQ-198986 SV_CODEGEN Hitting xmvlog_cg: *E,DLNORD: Intermediate file for module could not be read
    AVSREQ-195522 SV_CODEGEN Internal exception due to a wrong type of argument in using $psprintf
    AVSREQ-207781 SV_DATATYPES Agile - 23.11.a07120231201 - Perf Bringup - VLOG Error - DTPUNS -
    AVSREQ-198727 SV_DATATYPES Elaboration *E,TYCMPAT for bit mailbox put(1) call
    AVSREQ-188803 SV_DATATYPES Getting "QAANIY" while using typedef inside unpacked struct used as AA index
    AVSREQ-208696 SV_DPI In 64bit mode, Xcelium generates linker warnings like ld: skipping incompatible /usr/lib/libm.so when searching for -lm
    AVSREQ-202534 SV_DPI Unexpected exit: xmsim: symbol lookup error: ./xc_work/libixcg.so: undefined symbol
    AVSREQ-195705 SV_DPI stdout buffering causes corrupt log messages
    AVSREQ-200058 SV_DYNAMIC_DATATYPES Create a run time check under a switch on instantiation of virtual classes
    AVSREQ-214655 SV_GENERAL xmvlog *E,WOUPXR when trying to display a queue element from an array element
    AVSREQ-208294 SV_GENERAL Xcelium report XMEEOR_2121 cu_vifc_check_access - mark flags mismatched
    AVSREQ-207222 SV_GENERAL xmelab: *F,CGFAIL: Code generation failed for one or more modules. (xprop #2)
    AVSREQ-204830 SV_GENERAL xmelab INTERR: smi_get_source_marker - default (0) w/ 23.03.v004
    AVSREQ-200811 SV_GENERAL HIRNIM Error with new repo for CSW block - extern task in if-generate inside modules
    AVSREQ-200034 SV_GENERAL xmelab: *F,INTERR: INTERNAL EXCEPTION
    AVSREQ-198497 SV_GENERAL Xcelium reports wrong file path for $display messages
    AVSREQ-198347 SV_GENERAL SmartLog missing xm_force message and xm_release message
    AVSREQ-195211 SV_GENERAL Assignment failure in 22.09.v004 when pes kicks in
    AVSREQ-194071 SV_GENERAL Is it possible to know dynamically (from SystemVerilog code) what access the design was compiled with?
    AVSREQ-175210 SV_GENERAL function cannot call external task
    AVSREQ-169209 SV_GENERAL simulation run with coverage exits unexpectedly with sv_seghandler
    AVSREQ-149892 SV_GENERAL ILLFMT error when using %p in system tasks like error, warning except display
    AVSREQ-148427 SV_GENERAL Support of sparse array (-sparsearray) for the multidimensional unpacked array
    AVSREQ-144378 SV_GENERAL Sparsearray option to work for multi-dimensional unpacked array as well
    AVSREQ-199449 SV_INTERFACE Intermittent crash with message sslu_ascend_helper - climb out of Vlog when xmclone is used
    AVSREQ-194599 SV_INTERFACE Make -enable_vmac default under DEBUG build
    AVSREQ-206469 SV_LET *E,LTEANE: Arbitrary expression in let actual is not supported in phase 7
    AVSREQ-121257 SV_LET INTERNAL EXCEPTION when if signal is accessed using "let" expression with genvar
    AVSREQ-87109 SV_LET E,UNLETE - getting this for immediate assertion that uses a let sentence
    AVSREQ-212952 SV_PARAMETERS xmclone build freezes on 'Before xmclone OOMR consistency check'
    AVSREQ-210108 SV_PARAMETERS partition filegen getting stuck when using -automsie or -genpartition
    AVSREQ-204872 SV_PARAMETERS Seeing unexpected WOUPSR
    AVSREQ-199966 SV_PARAMETERS defparam does not take effect
    AVSREQ-198825 SV_PARAMETERS xmelab: *E,BLTNCF : Invocation of built-in methods in constant function is not yet supported.
    AVSREQ-194605 SV_PARAMETERS -defparam doesn't work with string parameter
    AVSREQ-210091 SV_PERFORMANCE Customer design throws internal error with ENABLE_SPARSEONAUTO
    AVSREQ-203588 SV_PERFORMANCE Xcelium reports internal exception when using EHF 2310_e788
    AVSREQ-203337 SV_PERFORMANCE Simulation failure in customer design with UVM_FATAL
    AVSREQ-201584 SV_PERFORMANCE Multiple parallel While loops causing 3x simulation time gap with reference
    AVSREQ-201211 SV_PERFORMANCE *F,INTERR: INTERNAL EXCEPTION
    AVSREQ-201090 SV_PERFORMANCE xmsim *F,INTERR: svqh_delete - buff
    AVSREQ-200391 SV_PERFORMANCE Tool crash in simulation *F, INTERR
    AVSREQ-197382 SV_PERFORMANCE xrun "for" loop code consumes big memory of processing 4096*4096*8 bit data in one clk in reference model
    AVSREQ-196685 SV_PERFORMANCE Higher contribution of clocking block in simulation
    AVSREQ-196134 SV_PERFORMANCE With coverage + Cadence VIP the testcase is running for more than 2 days
    AVSREQ-166065 SV_PERFORMANCE Method SSS_MT_MINNOW has high contribution in xmprof.out
    AVSREQ-207839 SV_PORTS -newsv, -plussv, -enable_bitsel_reg_port not helping on solution of CICAPC
    AVSREQ-209351 SV_RUNTIME observing crash in xmsim with no error information in log or bpad*.err file
    AVSREQ-208980 SV_RUNTIME Enhance Xcelium to support $readmem pathname/filename of up to 4095 characters
    AVSREQ-207956 SV_RUNTIME xcelium returns non zero without error message
    AVSREQ-207881 SV_RUNTIME BSSXCD error in UVM testbench during simulation
    AVSREQ-207800 SV_RUNTIME Why does $readmemb limit file name to 1024 characters even when the filename is shorter.
    AVSREQ-203664 SV_RUNTIME Use of initializers in fork/for leading to failure
    AVSREQ-203285 SV_RUNTIME System call erroring out with "Text file busy" and error 32256
    AVSREQ-200347 SV_RUNTIME run -adjacent (stepping over a line of code) is taking a really long time
    AVSREQ-197263 SV_RUNTIME Crash in the Xcelium error handler
    AVSREQ-196946 SV_RUNTIME Enhancement for xmsim: *F,INTERR caused by library version unsupported
    AVSREQ-196128 SV_RUNTIME xmsim does not work as expected but process doesn't die
    AVSREQ-93922 SV_RUNTIME RMEMEOOR: Random values in error message shown in simulator
    AVSREQ-205063 SV_SYSTEM_TASK_FUNCS Simulator goes into an infinite loop when integer is passed onto a %s format identifier
    AVSREQ-203564 SYSC_GENERAL Coverage support for gcc/g++ compiled code
    AVSREQ-188250 SYSC_GENERAL bpad*.err file not capturing user code info when xmsim exiting with 255
    AVSREQ-153124 SYSC_GENERAL xmelab: *E,SCIPDT: Unsupported 'inp' connection: SystemC double port should be connected to a 64-bit Verilog vector port.
    AVSREQ-102183 SYSC_GENERAL Cannot connect SystemC double ports on SV real ports: fatal error or tool crash at elaboration
    AVSREQ-99963 SYSC_GENERAL Cannot connect SystemC double ports on SV real ports: fatal error or tool crash at elaboration
    AVSREQ-203932 UVM Re: Disabling generation of tr_db.log from uvm 1.2
    AVSREQ-203225 UVM Re: Disabling generation of tr_db.log from uvm 1.2
    AVSREQ-204961 UVM_SV `uvm_field_int(addr,UVM_ALL_ON || UVM_NOCOMPARE) behavior inconsistency with switch -linedebug
    AVSREQ-193294 UVM_SV CDNS1.2 uvm_report_server prints time with $time without $realtime
    AVSREQ-202579 VHDL_CODEGEN Fatal error when VHDL 1993 code is compiled with the -v200x
    AVSREQ-202129 VHDL_CODEGEN alias to an element of an array causes internal error: MESSAGE: gq_shapecheck - ic1 null
    AVSREQ-202127 VHDL_PARSE xmvhdl_p segmentation fault from alias to array element in a generate
    AVSREQ-201929 VHDL_PERFORMANCE SPS/PES getting disable
    AVSREQ-213186 VPI_GENERAL Set env CDNS_AVSREQ_208002_ENABLE default turned on
    AVSREQ-212957 VPI_GENERAL SIGSEGV in sslu_with_local_trdrv_method_num of ipi_cbForce_cuf_int
    AVSREQ-211472 VPI_GENERAL uvm_hdl_force API support for wreal/real type
    AVSREQ-209925 VPI_GENERAL Need to use VPI to read allthe member variables of a SystemVerilog classobject, including those defined in the base class
    AVSREQ-209834 VPI_GENERAL SIGABRT in ipi_normalizedSubHandleByIndex
    AVSREQ-209234 VPI_GENERAL Force call back support for shortint, longint and byte.
    AVSREQ-208471 VPI_GENERAL No textref visible for array when used with array methods
    AVSREQ-207794 VPI_GENERAL A parameter with no default value returns vpiUndefined instead of vpiConstType when using the vpi_get, even when a value is passed in during the module instantiation
    AVSREQ-205232 VPI_GENERAL Add support for unpacked struct wire port
    AVSREQ-203597 VPI_GENERAL Unexpected exit in information model code
    AVSREQ-202117 VPI_GENERAL INTERR during ida_probe with -tb_dut_access
    AVSREQ-197584 VPI_GENERAL Enhance vpi force callback for individual members of packed structs
    AVSREQ-210004 VPI_LWD struct elment in $stable expression does not get added to contributing signal
    AVSREQ-209062 VPI_LWD Show Contributing Signal does not show contributing signal of OOMR in assertion
    AVSREQ-203423 VPI_LWD vpiEnumNet should not access vpiRange
    AVSREQ-202755 VPI_PLI Wrong VPI type interpretation when using 2 dimensional array.
    AVSREQ-204575 VPI_VISA ERROR:VPINOPTVAL vpiPartSelect
    AVSREQ-212280 VST_PRIME cgfail with "xform For_generate_always_06"
    AVSREQ-211846 VST_PRIME Xmelab error "*E,URRNG : Unresolved range" observed with latest 24.02 agile kit
    AVSREQ-211312 VST_PRIME xmelab: *E,WANOTL - A net is not a legal lvalue in this context [9.3.1(IEEE)]
    AVSREQ-210746 VST_PRIME xmelab: *F,XMERROR_9260: xfl_insert_local_decls - no mapping for local reg
    AVSREQ-209581 VST_PRIME Crash with xform option in agile nightly kit *always_05
    AVSREQ-209472 VST_PRIME Assertion failure #2 in Xprop synth rams tree (related to -xform Ca_war_super)
    AVSREQ-209076 VST_PRIME Switch to disable ALL -xform switches at once?
    AVSREQ-208659 VST_PRIME Tool exits unexpectedly with xmsim while dumping VWDB (in xprop synth RAMs design)
    AVSREQ-208387 VST_PRIME Crash with xform optimizations of nightly build 23.11.x
    AVSREQ-208267 VST_PRIME Short term improvement of textrefs with "-xform"
    AVSREQ-205254 VST_PRIME "-xform La_to_inst_udp" showing some instances not converted to UDP (in profile)
    AVSREQ-204847 VST_PRIME XFORM_PROD - MESSAGE: sv_seghandler - trapno -1 addr(0x8)
    AVSREQ-204580 VST_PRIME issue with MSIE : OOMR?
    AVSREQ-204311 VST_PRIME 23.09 ehf kit is ~5% slower than 23.08 agile (gb202 222 config, simulation)
    AVSREQ-204269 VST_PRIME "-xform CA_and_pes" not production ready in 23.09 RC kit
    AVSREQ-203462 VST_PRIME Simulation (Assertion) Errors with 23.09 kit
    AVSREQ-203103 VST_PRIME The optimization -xform_lite Ff_Split, Split_Suspendable_Block causing unexpected behavior in NBA for PLL
    AVSREQ-202639 VST_PRIME Internal Error with 23.08 release and -XFORM prod option
    AVSREQ-202366 VST_PRIME Optimizing a fork / join_any usage with wait statements
    AVSREQ-201489 VST_PRIME xmelab exits unexpectedly with "-xform Dot_star_port_connection"
    AVSREQ-201022 VST_PRIME "xmvlog_cg: *F,TMPSPC: Runtime temporary space requirements too large in Non-blocking Assignment " for one of the customer design due to switch -XFORM_LITE prod
    AVSREQ-200442 VST_PRIME Elab Crash seen for GPU blocks with 23.08 nightly : sv_seghandler - trapno -1 addr(0x15519764c0c8)
    AVSREQ-200158 VST_PRIME GPU blocks (live design) got stuck during Xmelab for 23.08 nightly
    AVSREQ-191764 VWDB DRAPI Performance Issue vs SHM DRAPI
    AVSREQ-210055 VWDB_XCELIUM Simulation fatal xmsim: *F,SIGUSR in customer env due to incorrectly linking VWDB json to xmsim executable
    AVSREQ-203084 XM_UTILS_GENERAL seemingly spurious CUNSTP warning
    AVSREQ-202507 XM_UTILS_GENERAL xmelab: *W,CUNSTP - Access permission could not be marked for variable in xmutil call as it is not a string literal or string parameter
    AVSREQ-195209 XM_UTILS_GENERAL XMUTILS mirroring does not work without access
    AVSREQ-189638 XM_UTILS_GENERAL Support $xm_mirror_force with unpacked arrays
    AVSREQ-210555 XPROPAGATION_GENERAL xmvlog_cg: *F,XMERROR_8950: gq_auto_swbwo - not found found_dot
    AVSREQ-209473 XPROPAGATION_GENERAL XFANEN warning when running single step MSIE
    AVSREQ-208241 XPROPAGATION_GENERAL Internal error exception from Xcelium when enabling xprop
    AVSREQ-207182 XPROPAGATION_GENERAL xmvlog_cg: *F,TMPSPC error for xprop CAT mode
    AVSREQ-206911 XPROPAGATION_GENERAL elab does not work as expected with - gq_condtob
    AVSREQ-206802 XPROPAGATION_GENERAL Unusual *F,SOPARM error during xmvlog_cg
    AVSREQ-206648 XPROPAGATION_GENERAL Memory corruption crash xmvlog_cg
    AVSREQ-206610 XPROPAGATION_GENERAL Xprop switch for unlimited case item expression support
    AVSREQ-206300 XPROPAGATION_GENERAL LP xmelab does not work as expected with - gq_get_expanded_unpacked_offset
    AVSREQ-205480 XPROPAGATION_GENERAL Can xprop be turned off for dynamic datatypes?
    AVSREQ-205274 XPROPAGATION_GENERAL SCOPE_BLOCK VHDL rule support
    AVSREQ-204753 XPROPAGATION_GENERAL xmelab: *F,CGFAIL: Code generation failed for one or more modules (xprop)
    AVSREQ-204177 XPROPAGATION_GENERAL elab stops unexpectedly ssx_xhname.part - when running with xprop
    AVSREQ-204143 XPROPAGATION_GENERAL Intermittent issue where a register is not being correctly reset
    AVSREQ-201166 XPROPAGATION_GENERAL xmvlog: *F INTERNAL-gq_xf_fxtrct - overflow
    AVSREQ-192329 XPROPAGATION_GENERAL Failure with -newperf (-enable_vect_of_non_boundary_vhdl_port) + XPROP + access +r +VH_ALLOWINDEX (xfile) in vhdl record array assignments
    AVSREQ-184383 XPROPAGATION_PERFORMANCE Xprop build time and memory increases when compiling synthesizable RAMS
    AVSREQ-210807 XRUN_GENERAL NOSTUP missing info
    AVSREQ-207854 XRUN_GENERAL xrun: *W,NO_INSTALL_PATH: Unable to log invoked binary path.
    AVSREQ-207489 XRUN_GENERAL New file being written inside snapshot directory (when simulation starts)
    AVSREQ-201906 XRUN_GENERAL Multiple "-seed" option with same argument gives "OPTNOML" error
    AVSREQ-197506 XRUN_GENERAL xrun -file is not working when file has -v option
    AVSREQ-197116 XRUN_GENERAL Please document -xmout_msgsev functionality in xrun Docs
    AVSREQ-196866 XRUN_GENERAL can't load archive with -L and -l, gives F,NOFDPI error
    AVSREQ-191972 XRUN_GENERAL Fix all places in xcelium and related tools where hostname + pid is assumed unique
    AVSREQ-191621 XRUN_GENERAL xrun does not support cds.lib files with lines longer than 4096 characters
    AVSREQ-188118 XRUN_GENERAL Xrun should return non-zero status and print meaningful info in case the job is stopped by LSF
    AVSREQ-184687 XRUN_GENERAL Dump the exact compile(xrun) command for recompile
    AVSREQ-183118 XRUN_GENERAL worklib_-3.ts getting touched when running simulation which causes recompile with no code change
    AVSREQ-182949 XRUN_GENERAL Request: Save xrun's env variables for each step of xrun flow

    Cadence's Xcelium Logic Simulation provides best-in-class core engine performance for SystemVerilog, VHDL, mixed-signal, low power, and x-propagation. It supports both single-core and multi-core simulation, incremental and parallel build, and save/restart with dynamic test reload. The Xcelium Logic Simulator has been deployed by a majority of top semiconductor companies, and a majority of top companies in the hyperscale, automotive and consumer electronics segments. Using computational software and a proprietary machine learning technology that directly interfaces to the simulation kernel, Xcelium learns iteratively over an entire simulation regression. It analyzes patterns hidden in the verification environment and guides the Xcelium randomization kernel on subsequent regression runs to achieve matching coverage with reduced simulation cycles. Xcelium is part of the Cadence Verification Suite and supports the company’s Intelligent System Design strategy, enabling pervasive intelligence and faster design closure.

    Accelerating DFT Simulations with Xcelium Multi-Core


    Are long DFT simulations posing a big challenge to meet your tight project schedules? We have a solution to accelerate the long running DFT tests. Watch this video to know how easy it is to set-up Xcelium Multi-Core to get up to 5X acceleration for a variety of DFT use cases ranging from serial and parallel ATPG to MBIST and LBIST
    Cadence is a pivotal leader in electronic design and computational expertise, using its Intelligent System Design strategy to turn design concepts into reality. Cadence customers are the world’s most creative and innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications.

    Owner: Cadence
    Product Name: XCELIUM
    Version: 24.03.001 (XCELIUMMAIN) Base Release
    Supported Architectures: x86_64
    Website Home Page : www.cadence.com
    Languages Supported: english
    System Requirements: Linux *
    Size: 6.9 Gb

    Cadence XCELIUMMAIN 24.03.001

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    Cadence XCELIUMMAIN 24.03.001