Intel Quartus Prime Standard/Professional Edition 18.1 Linux

Altera, now part of Intel, announced the production release the new version of Quartus Prime design software, which further accelerates FPGA design performance and design team productivity.

What's New in Intel Quartus Prime Software 18.1:

Performance
- Auto-Pipelining and Latency Insensitive False Path:
Intel Quartus Prime Pro Edition can now automatically add the optimal number of pipe stages to your design in locations that have been marked as “Variable Latency” (i.e. areas where the number of cycles it takes for a signal to pass is not important). This feature can help users achieve a high fmax without unnecessarily increasing the designs resource utilization.
- Hyperflex Optimized Interconnect in Platform Designer:
In 18.1 Platform Designer interconnect IPs have been updated to take advantage of Stratix 10 Hyperflex architecture. User will now see significant frequency improvements in their Stratix 10 designs compared to 18.0.
- Introducing Fractal Synthesis in Intel Quartus Prime Pro Edition
To meet the growing need for utilizing the flexibility of an FPGA for arithmetic acceleration, Intel is introducing Fractal Synthesis - a feature that enables Intel Quartus Prime to use FPGA resources to create repetitive dot product structures in a highly efficient way. Fractal Synthesis allows Intel Quartus Prime to achieve 20-45% area reduction compared to regular Intel Quartus Prime flow.
Productivity
- Compile Time:
Continue seeing improvements in compile time for your Intel Stratix 10 designs in 18.1 compared to prior releases. Check out the Compile User Guide for additional tips on how to reduce compile times
- Memory Reduction:
With Intel Quartus Prime Pro Edition Software 18.1, all designs will experience reductions in peak virtual memory requirements as compared to 18.0. All Intel Stratix 10 designs will compile in less than 64 GB of memory space.
- Database Migration:
Stratix 10 device users can now import the database for a hierarchical block from one release to another. This allows the user to do a timing analysis of a partial reconfiguration region developed in a later release with the place and route results for the static region in a previous release.
- Compiler Modes:
In 18.1 Quartus comes with even more optimization option, giving users a choice in improving their design’s routability and performance. Find more information on these different modes in the compiler guide. Additional modes have also been added to the Design Space Explorer.
Usability
- Quartus GUI:
Updates have been made to the GUI for Clock Tree, Chip Planner and Pin Planner. Users now have more visibility into the clock tree and how the clock tree is synthesized and will see improvements in floor planning capability.
- Platform Designer Usability Enhancements:
The Systems Contents Tool will be replaced with a new System View Tool. This tool will allow users to define their project’s hierarchy from a view perspective rather than a design perspective and enables multi-level hierarchy modules interactions within the GUI.

Intel Quartus Prime Standard/Pro Edition Version 18.1 Software and Device Support Release Notes

About Quartus Prime Design Software 18.0 Intel Quartus Prime software 18.0 has improvements made across the three key areas that designers care about the most—performance, productivity, and usability. Intel Quartus Prime Pro Edition software 18.0 supports Intel Stratix 10 TX, MX, SX, and GX devices. Accelerate FPGA development with faster compile times of Intel Stratix 10 designs in 18.0 as compared to prior releases. Larger Intel Stratix 10 designs show greater compile time reduction. There are additional settings on how to reduce compile time that can be accessed in the compiler user guide. With Intel Quartus prime pro edition software 18.0, designs will now experience a significant reduction in peak virtual memory requirements as compared to the 17.1.1 release. All Intel Stratix 10 designs compile in less than 64 GB of memory space.

Concurrent analysis support provides the ability to analyze the results of a design while compilation is running. This feature is supported with timing analyzer, netlist viewers, and compilation reports, enabling designs to be completed much faster. Partial reconfiguration (PR) allows users to reconfigure a portion of the FPGA dynamically while the remaining FPGA design continues to function. With Intel Quartus Prime Pro Edition software 18.0, users can accelerate their applications using Intel FPGA programming tools on the Cloud to program FPGAs in a high-performance computing environment provided by Nimbix.

About Altera Corporation. Altera Corporation is at the forefront of technology innovation, providing customers programmable solutions for leading-edge electronic systems that are shaping our modern world. Headquartered in Silicon Valley, California, Altera has been supplying the industry with access to the latest programmable logic, process technologies, IP cores and development tools for more than 30 years. Altera was founded in 1983 and employs more than 3,000 people in over 20 countries.

Product: Intel Quartus Prime
Version: Standard / Professional Edition (version 18.1.0.222(625)) with Device Support
Supported Architectures: x64
Website Home Page : www.intel.com
Language: english
System Requirements: Linux
Supported Operating Systems: Red Hat Enterprise Linux 5.11, 6.8, 7.3
Size: 66.7 Gb