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Testing of Interposer-Based 2.5D Integrated Circuits [Repost]
![Testing of Interposer-Based 2.5D Integrated Circuits [Repost]](https://pixhost.icu/avaxhome/23/cb/004ccb23.jpg)
Ran Wang, Krishnendu Chakrabarty - Testing of Interposer-Based 2.5D Integrated Circuits
Published: 2017-03-21 | ISBN: 3319547135 | PDF | 182 pages | 12.52 MB
This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies. This book covers many testing techniques that have already been used in mainstream semiconductor companies. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 2.5D ICs a reality and commercially viable.