Richard Sharp, «Higher-Level Hardware Synthesis»
Richard Sharp, «Higher-Level Hardware Synthesis»
Springer | ISBN 3540213066 | 2004 Year | PDF | 7,34 Mb | 195 Pages
Springer | ISBN 3540213066 | 2004 Year | PDF | 7,34 Mb | 195 Pages
The exponential increase in transistor density on computer chips, supporting Moore¿s law now for four decades, poses new design challenges to engineers and computer scientists alike. New techniques for managing complexity must be developed if circuits are to take full advantage of the vast numbers of transistors available.
This book investigates both the design of high-level languages for hardware description and techniques involved in translating these high-level languages to silicon. The author introduces the first-order functional language SAFL, designed specifically for behavioral hardware description, and describes the implementation of its associated silicon compiler. Finally, the SAFL language is extended with pi-calculus style channels and channel passing and primitives for structural-level circuit description. The semantics of these languages is formalized and results are presented arising from the generation of real hardware exploiting these techniques.
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