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    3. On-Chip Training NPU - Algorithm, Architecture and SoC Design (Repost)

    On-Chip Training NPU - Algorithm, Architecture and SoC Design (Repost)

    Posted By: AvaxGenius
    Date: 5 Jun 2025 00:00:34
    On-Chip Training NPU - Algorithm, Architecture and SoC Design (Repost)

    On-Chip Training NPU - Algorithm, Architecture and SoC Design by Donghyeon Han , Hoi-Jun Yoo
    English | PDF EPUB (True) | 2023 | 249 Pages | ISBN : 3031342364 | 131.3 MB

    Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.
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