Dans "Pouvoirs du poème", Charles Juliet explore la puissance et la profondeur de la poésie, en tant qu'art capable de révéler les mystères de l'existence humaine. À travers une réflexion subtile et intime, l'auteur partage sa vision du poème comme un outil d'expression, de transformation et de quête de vérité. …

This book analyzes automatic gain control (AGC) loop circuits and demonstrates AGC solutions in the environment of wireless receivers, mainly in wireless receivers with stringent constraints in settling-time and wide dynamic range, such as WLAN and Bluetooth receivers. Since feedforward AGCs present great advantages in this context, as an alternative to conventional feedback AGCs, this book includes a detailed study of feedforward AGCs design –at the level of basic AGC cells, as well as the system level, including their main characteristics and performance.

This Book and Simulation Software Bundle Project Dear Reader, this book project brings to you a unique study tool for ESD protection solutions used in analog-integrated circuit (IC) design. Quick-start learning is combined with in-depth understanding for the whole spectrum of cro- disciplinary knowledge required to excel in the ESD ?eld. The chapters cover technical material from elementary semiconductor structure and device levels up to complex analog circuit design examples and case studies. The book project provides two different options for learning the material. The printed material can be studied as any regular technical textbook. At the same time, another option adds parallel exercise using the trial version of a complementary commercial simulation tool with prepared simulation examples. Combination of the textbook material with numerical simulation experience presents a unique opportunity to gain a level of expertise that is hard to achieve otherwise. The book is bundled with simpli?ed trial version of commercial mixed- TM mode simulation software from Angstrom Design Automation. The DECIMM (Device Circuit Mixed-Mode) simulator tool and complementary to the book s- ulation examples can be downloaded from www.analogesd.com. The simulation examples prepared by the authors support the speci?c examples discussed across the book chapters. A key idea behind this project is to provide an opportunity to not only study the book material but also gain a much deeper understanding of the subject by direct experience through practical simulation examples.

The intention of this book is to address a number of timely, performance-critical issues within the field of short-distance optical communications, from a circuit designer’s perspective. It discusses the major trade-offs the designer has to deal with in the development of monolithically integrated receivers in CMOS technologies. As such, it is based on Dr. Muller’s doctoral dissertation entitled “A Standard CMOS Multi-Channel Single-Chip Receiver for Multi-Gigabit Optical Data Communications”, subm- ted to the School of Engineering of the École Polytechnique Fédérale de Lausanne (EPFL) in May 2006. The dissertation material has been enhanced by the presentation of a number of alternative design approaches and circuit topologies, providing exhaustive coverage of the state of the art in optical sho- distance receiver circuit design. The need for a new processor input/output (I/O) interface paradigm is dictated by ongoing te- nology scaling and the advent of multi-core systems. Indeed, each new generation of microprocessors and digital signal processors provides higher computing power and data throughput, whereas the available bandwidth of the I/O interfaces is subject to much slower growth. Moving beyond - coming serial links to an optical data link paradigm for very short-distance (board-to-board and chip– chip communications allows for considerable I/O interface bandwidth enhancement. Fully integrated silicon CMOS receivers are considered to be the technology of choice to lead this solution to economic success, because monolithic integration results in lower volume-manufacturing cost, improved yield and reduced assembly and test expenses.

The increasing performance of smart microsystems merging sensors, signal processing and wireless communication promises to have a pervasive impact during the coming decade. These autonomous microsystems nd applications in sport evaluation, health care, environmental monitoring and automotive s- tems. They gather data from the physical world, convert them to electrical form, compensate for interfering variables or non-linearities, and either act - rectly on them or transfer it to other systems. Most often, these sensor systems are developed for a speci c application. This approach leads to a high rec- rent design cost. A generic front-end architecture, where only the sensors and the microcontroller software are customized to the selected application, would reduce the costs signi cantly. This work presents a new generic architecture for autonomous sensor nodes. The modular design methodology provides a exible way to build a complete sensor interface out of con gurable blocks. The settings of these blocks can be optimized according to the varying needs of the application. Furthermore, the system can easily be expanded with new building blocks. The modular system is illustrated in a Generic Sensor Interface Chip (GSIC) for capa- tive sensors. Many con guration settings adapt the interface to a broad range of applications. The GSIC is optimized for ultra low power consumption. It achieves an ON-state current consumption of 40?A.