The developments in mesh generation are usually driven by the needs of new applications and/or novel algorithms. The last decade has seen a renewed interest in mesh generation and adaptation by the computational engineering community, due to the challenges introduced by complex industrial problems.
Another common challenge is the need to handle complex geometries. Nowadays, it is becoming obvious that geometry should be persistent throughout the whole simulation process. Several methodologies that can carry the geometric information throughout the simulation stage are available, but due to the novelty of these methods, the generation of suitable meshes for these techniques is still the main obstacle for the industrial uptake of this technology.

General Applications of BEM to electromagnetic problems are comparatively new although the method is ideally suited to solve these problems, which usually involve unbounded domains. The present volume comprises contributions by eminent researchers working on applications of boundary elements in electromagnetic problems. The volume deals with the solutions of Maxwell's equation for three-dimensional as well as two-dimensional cases. It also discusses combination of BEM with FEM particularly in the case of saturated media. Some chapters specifically deal with the design of electromagnetic devices. The book is essential reading to those engineers and scientists, who are interested in the state of the art for electrical and electromagnetic application of boundary elements. It is also an important reference for those engineers who are working on the design of electromagnetic components many of which can be advantageously carried out using BEM.

The assembly of electronic circuit boards has emerged as one of the most significant growth areas for robotics and automated assembly. This comprehensive volume, which is an edited collection of material mostly published in "Assembly Engineering" and "Electronic Packaging and Production", will provide an essential reference for engineers working in this field, including material on Multi Layer Boards, Chip-on-board and numerous case studies. Frank J. Riley is senior vice-president of the Bodine Corporation and a world authority on assembly automation.

The publication of Introduction to Robotics is one among the results of many years' work by the authors of this book in the study of robotics. During the first stage of this work, devoted to locomotion robots and anthropomorphic mechanisms in particular, a number of papers were published in the period 1974-76. The most prominent of them is M. VukobratoviC's Legged Locomotion Systems and Anthropomorphic Mechanisms, published in English, Russian, Japanese and Chinese.

In the mid 1960s, when a single chip contained an average of 50 transistors, Gordon Moore observed that integrated circuits were doubling in complexity every year. In an in?uential article published by Electronics Magazine in 1965, Moore predicted that this trend would continue for the next 10 years. Despite being criticized for its “unrealistic optimism,” Moore’s prediction has remained valid for far longer than even he imagined: today, chips built using state– the-art techniques typically contain several million transistors. The advances in fabrication technology that have supported Moore’s law for four decades have fuelled the computer revolution. However,this exponential increase in transistor density poses new design challenges to engineers and computer scientists alike. New techniques for managing complexity must be developed if circuits are to take full advantage of the vast numbers of transistors available. In this monograph we investigate both (i) the design of high-level languages for hardware description, and (ii) techniques involved in translating these hi- level languages to silicon. We propose SAFL, a ?rst-order functional language designedspeci?callyforbehavioralhardwaredescription,anddescribetheimp- mentation of its associated silicon compiler. We show that the high-level pr- erties of SAFL allow one to exploit program analyses and optimizations that are not employed in existing synthesis systems. Furthermore, since SAFL fully abstracts the low-leveldetails of the implementation technology, we show how it can be compiled to a range of di?erent design styles including fully synchronous design and globally asynchronous locally synchronous (GALS) circuits.

In this book, we are concerned with studying the co-design methodology, in general, and how to determine the more suitable interface mechanism in a co-design system, in particular. This will be based on the characteristics of the application and those of the target architecture of the system. We provide guidelines to support the designer's choice of the interface mechanism.

VHDL Coding Styles and Methodologies, Edition is a follow up book to the first edition of same book and to VHDL Answers to Frequently Asked Questions, first and second editions. This book was originally written as a teaching tool for a VHDL training course. The author began writing the book because he could not find a practical and easy to read book that gave in depth coverage of both, the language and coding methodologies. This edition provides practical information on reusable software methodologies for the design of bus functional models for testbenches. It also provides guidelines in the use of VHDL for synthesis. All VHDL code described in the book is on a companion CD. The CD also includes the GNU toolsuite with EMACS language sensitive editor (with VHDL, Verilog, and other language templates), and TSHELL tools that emulate a Unix shell. Model Technology graciously included a timed evaluation version of ModelSim, a recognized industry standard VHDL/Verilog compiler and simulator that supports easy viewing of the models under analysis, along with many debug features. In addition, Synplicity included a timed version of Synplify, a very efficient, user friendly and easy to use FPGA synthesis tool. Synplify provides a user both the RTL and gate level views of the synthesized model, and a performance report of the design. Optimization mechanisms are provided in the tool.

See How the Magic Happens

Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding.