Rapid Prototyping of Digital Systems: Quartus II Edition provides an exciting and challenging laboratory component for undergraduate digital logic and computer design courses using FPGAs and CAD tools for simulation and hardware implementation. The more advanced topics and exercises also make this text useful for upper level courses in digital logic, programmable logic, and embedded systems. This new version of the widely used Rapid Prototyping of Digital Systems, Second Edition, now uses Altera's new Quartus II CAD tool and includes laboratory projects for Altera's UP 2 and the new UP 3 FPGA board.

Intellectual Property Protection in VLSI Designs: Theory and Practice provides an overview of the security problems in modern VLSI design with a detailed treatment of our newly developed constraint-based protection paradigm for the protection of VLSI design IPs from FPGA design to standard-cell placement, from high-level synthesis solutions to gate-level netlist place-and-rout, and from advanced CAD tools to physical design algorithms. The problem of VLSI design IP protection is much more challenging than the protection of multimedia contents or software, and our protection paradigm is also conceptually different from the state-of-the-art approaches in those domains.

Field-programmable gate arrays (FPGAs), which are pre-fabricated, programmable digital integrated circuits (ICs), provide easy access to state-of-the-art integrated circuit process technology, and in doing so, democratize this technology of our time. This book is about comparing the qualities of FPGA – their speed performance, area and power consumption, against custom-fabricated ICs, and exploring ways of mitigating their de ciencies. This work began as a question that many have asked, and few had the resources to answer – how much worse is an FPGA compared to a custom-designed chip? As we dealt with that question, we found that it was far more dif cult to answer than we anticipated, but that the results were rich basic insights on fundamental understandings of FPGA architecture. It also encouraged us to nd ways to leverage those insights to seek ways to make FPGA technology better, which is what the second half of the book is about. While the question “How much worse is an FPGA than an ASIC?” has been a constant sub-theme of all research on FPGAs, it was posed most directly, some time around May 2004, by Professor Abbas El Gamal from Stanford University to us – he was working on a 3D FPGA, and was wondering if any real measurements had been made in this kind of comparison. Shortly thereafter we took it up and tried to answer in a serious way.

Embedded systems applications that are either mission or safety-critical usually entail low- to mid- production volumes, require the rapid development of specific tasks, which are typically computing intensive, and are cost bounded. The adoption of re-configurable FPGAs in such application domains is constrained to the availability of suitable techniques to guarantee the dependability requirements entailed by critical applications. This book describes the challenges faced by designers when implementing a mission- or safety-critical application using re-configurable FPGAs and it details various techniques to overcome these challenges. In addition to an overview of the key concepts of re-configurable FPGAs, it provides a theoretical description of the failure modes that can cause incorrect operation of re-configurable FPGA-based electronic systems. It also outlines analysis techniques that can be used to forecast such failures and covers the theory behind solutions to mitigate fault effects. This book also reviews current technologies available for building re-configurable FPGAs, specifically SRAM-based technology and Flash-based technology. For each technology introduced, theoretical concepts presented are applied to real cases. Design techniques and tools are presented to develop critical applications using commercial, off-the-shelf devices, such as Xilinx Virtex FPGAs, and Actel ProASIC FPGAs. Alternative techniques based on radiation hardened FPGAs, such as Xilinx SIRF and Atmel ATF280 are also presented. This publication is an invaluable reference for anyone interested in understanding the technologies of re-configurable FPGAs, as well as designers developing critical applications based on these technologies.

Logic Synthesis Using Synopsys®, Second Edition is for anyone who hates reading manuals but would still like to learn logic synthesis as practised in the real world. Synopsys Design Compiler, the leading synthesis tool in the EDA marketplace, is the primary focus of the book. The contents of this book are specially organized to assist designers accustomed to schematic capture-based design to develop the required expertise to effectively use the Synopsys Design Compiler. Over 100 `Classic Scenarios' faced by designers when using the Design Compiler have been captured, discussed and solutions provided. These scenarios are based on both personal experiences and actual user queries. A general understanding of the problem-solving techniques provided should help the reader debug similar and more complicated problems. In addition, several examples and dc_shell scripts (Design Compiler scripts) have also been provided.

This is the third edition of the European Workshop on Microelectronics Education (EWME). A steady-state regime has now been reached. An international community of university teachers is constituted; they exchange their experience and their pedagogical tools. They discuss the best ways to transfer the rapidly changing techniques to their students, and to introduce them to the new physical and mathematical concepts and models for the innovative techniques, devices, circuits and design methods. The number of abstracts submitted to EWME 2000 (about one hundred) enabled the scientific committee to proceed to a clear selection. EWME is a European meeting. Indeed, authors from 20 different European countries contribute to this volume. Nevertheless, the participation of authors from Brazil, Canada, China, New Zealand, and USA, shows that the workshop gradually attains an international dimension. th The 20 century can be characterized as the "century of electron". The electron, as an elementary particle, was discovered by J.J. Thomson in 1897, and was rapidly used to transfer energy and information. Thanks to electron, universe and micro-cosmos could be explored. Electron became the omnipotent and omnipresent, almost immaterial, angel of our W orId. This was made possible thanks to electronics and, for the last 30 years, to microelectronics. Microelectronics not only modified and even radically transformed the industrial and the every-day landscapes, but it also led to the so-called "information revolution" with which begins the 21 st century.

Piecewise Linear (PL) approximation of non-linear behaviour is a well-known technique in synthesis and analysis of electrical networks. However, the PL description should be efficient in data storage and the description should allow simple retrieval of the stored information. Furthermore, it would be useful if the model description could handle a large class of piecewise linear mappings.

For someone with a hammer the whole world looks like a nail. Within the last 10-13 years Binar·y Decision Diagmms (BDDs) have become the state-of-the-art data structure in VLSI CAD for representation and ma­ nipulation of Boolean functions. Today, BDDs are widely used and in the meantime have also been integrated in commercial tools, especially in the area of verijication and synthesis. The interest in BDDs results from the fact that the data structure is generally accepted as providing a good compromise between conciseness of representation and efficiency of manipulation. With increasing number of applications, also in non CAD areas, classical methods to handle BDDs are being improved and new questions and problems evolve and have to be solved. The book should help the reader who is not familiar with BDDs (or DDs in general) to get a quick start. On the other hand it will discuss several new aspects of BDDs, e.g. with respect to minimization and implementation of a package. This will help people working with BDDs (in industry or academia) to keep informed about recent developments in this area.

If you survey hardware design groups, you will learn that between 60% and 80% of their effort is dedicated to verification. This may seem unusually large, but I include in "verification" all debugging and correctness checking activities, not just writing and running testbenches. Every time a hardware designer pulls up a waveform viewer, he or she performs a verification task. With today’s ASIC and FPGA sizes and geometries, getting a design to fit and run at speed is no longer the main challenge. It is to get the right design, working as intended, at the right time. Unlike synthesizable coding, there is no particular coding style nor language required for verification. The freedom of using any l- guage that can be interfaced to a simulator and of using any features of that language has produced a wide array of techniques and approaches to verification. The continued absence of constraints and historical shortage of available expertise in verification, c- pled with an apparent under-appreciation of and under-investment in the verification function, has resulted in several different ad hoc approaches. The consequences of an informal, ill-equipped and understaffed verification process can range from a non-functional design requiring several re-spins, through a design with only a s- set of the intended functionality, to a delayed product shipment.

"Introduction to Embedded System Design Using Field Programmable Gate Arrays" provides a starting point for the use of field programmable gate arrays in the design of embedded systems. The text considers a hypothetical robot controller as an embedded application and weaves around it related concepts of FPGA-based digital design. The book details: use of FPGA vis-à-vis general purpose processor and microcontroller; design using Verilog hardware description language; digital design synthesis using Verilog and Xilinx® SpartanTM 3 FPGA; FPGA-based embedded processors and peripherals; overview of serial data communications and signal conditioning using FPGA; FPGA-based motor drive controllers; and prototyping digital systems using FPGA.

One of the very important parts of any digital system is the control unit, coordin- ing interplay of other system blocks. As a rule, control units have irregular str- ture, which makes process of their logic circuits design very sophisticated. In case of complex logic controllers, the problem of system design is reduced practically to the design of control units. Actually, we observe a real technical boom connected with achievements in semiconductor technology. One of these is the development of integrated circuit known as the "systems-on-a-programmable- chip" (SoPC), where the number of elements approaches one billion. Because of the extreme complexity of microchips, it is very important to develop effective design methods oriented on particular properties of logical elements. Solution of this problem permits impr- ing functional capabilities of the target digital system inside single SoPC chip. As majority of researches point out, design methods used in case of industrial packages are, in case of complex digital system design, far from optimal. Similar problems concern the design of control units with standard ?eld-programmable logic devices (FPLD), such as PLA, PAL, GAL, CPLD, and FPGA. Let us point out that modern SoPC are based on CPLD or FPGA technology. Thus, the development of eff- tive design methods oriented on FPLD implementation of logic circuits used in the control units still remains the problem of great importance.

This book is the most comprehensive treatment yet of the problems faced by the engineer caused by static electricity. Written in as non-technical a manner as possible, given the depth of the material, this book discusses the material from the beginner level to many advanced topics for engineers and designers. It discusses not only the harmful and damaging known effects of static electricity on electrical and electronic equipment, but the possible solutions and applications that can be used to stop it.

VHDL Answers to Frequently asked Questions is a follow-up to the author's book VHDL Coding Styles and Methodologies (ISBN 0-7923-9598-0). On completion of his first book, the author continued teaching VHDL and actively participated in the comp. lang. vhdl newsgroup. During his experiences, he was enlightened by the many interesting issues and questions relating to VHDL and synthesis. These pertained to: misinterpretations in the use of the language; methods for writing error free, and simulation efficient, code for testbench designs and for synthesis; and general principles and guidelines for design verification. As a result of this wealth of public knowledge contributed by a large VHDL community, the author decided to act as a facilitator of this information by collecting different classes of VHDL issues, and by elaborating on these topics through complete simulatable examples. This book is intended for those who are seeking an enhanced proficiency in VHDL. Its target audience includes: 1. Engineers. The book addresses a set of problems commonly experienced by real users of VHDL. It provides practical explanations to the questions, and suggests practical solutions to the raised issues. It also includes packages to achieve common utilities, useful in the generation of debug code aDd testbench designs. These packages include conversions to strings (the IMAGE package), generation of Linear Feedback Shift Registers (LFSR), Multiple Input Shift Register (MISR), and random number generators.